Biostar P4M80-M7 P4M80-M7 BIOS guide - Page 16
DRAM Clock/Drive Control, DRAM Clock, DRAM Timing, SDRAM CAS Latency, Bank Interleave, Precharge
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P4M80-M7 BIOS Manual 4.1 DRAM Clock/Drive Control To control the Clock/Drive. If you highlight the literal "Press Enter" next to the "DRAM Clock/Drive Control" label and then press the enter key, it will take you a submenu with the following options: 4.1.1 DRAM Clock This item determines DRAM clock following 100MHz, 133MHz, 166MHz or By SPD. The Choices: 100MHz, 133MHz, By SPD (default), 166MHz . 4.1.2 DRAM Timing This item determines DRAM clock/ timing follow SPD or not. The Choices: Auto By SPD (default), Manual, Turbo, Ultra. 4.1.3 SDRAM CAS Latency When SDRAM is installed, the number of clock cycles of CAS latency depends on the SDRAM timing. The Choices: 2.5 (default), 2. 4.1.4 Bank Interleave This item allows you to enable or disable the bank interleave feature. The Choices: Disabled (default), 2 bank, 4 bank. 4.1.5 Precharge to Active (Trp) This items allows you to specify the delay from precharge command to activate command. The Choices: 2T, 3T, 4T, 5T (default). 4.1.6 Active to Precharge (Tras) This items allows you to specify the minimum bank active time. The Choices: 7T, 6T (default). 15