Biostar P4M80-M7 P4M80-M7 BIOS guide - Page 20

CPU & PCI Bus Control, Vlink mode selection - cpu support

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P4M80-M7 BIOS Manual 4.3 CPU & PCI Bus Control If you highlight the literal "Press Enter" next to the "CPU & PCI Bus Control" label and then press the enter key, it will take you a submenu with the following options: 4.3.1 PCI Master 0 WS Write When enabled, writes to the PCI bus are executed with zero-wait states. The Choices: Enabled (default), Disabled. 4.3.2 PCI Delay Transaction The chipset has an embedded 32-bit posted write buffer to support delay transactions cycles. Select Enabled to support compliance with PCI specification. The Choices: Enabled (default), Disabled. 4.3.3 Vlink mode selection The Choices: Mode 1 (default). 4.3.4 VLink 8X Support This item allows you to enable or disable VLink 8X support. The Choices: Enabled (default), Disabled. 19

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P4M80-M7 BIOS Manual
19
4.3 CPU & PCI Bus Control
If you highlight the literal “Press Enter” next to the “CPU & PCI Bus Control” label and then
press the enter key, it will take you a submenu with the following options:
4.3.1
PCI Master 0 WS Write
When enabled, writes to the PCI bus are executed with zero-wait states.
The Choices: Enabled
(default), Disabled.
4.3.2
PCI Delay Transaction
The chipset has an embedded 32-bit posted write buffer to support delay transactions cycles.
Select Enabled to support compliance with PCI specification.
The Choices: Enabled
(default),
Disabled.
4.3.3
Vlink mode selection
The Choices: Mode 1
(default).
4.3.4
VLink 8X Support
This item allows you to enable or disable VLink 8X support.
The Choices: Enabled
(default), Disabled.