Dell PowerEdge R930 Dell PowerEdge R930 System Owners Manual - Page 4

Active I/O Risers - firmware update

Page 4 highlights

Active I/O Risers I/O Riser FRU image I2C EEPROM No Configuration image EEPROM No 12GB Daughter Card (Performance or Unified) Flash memory Flash No Expander NVRAM NVRAM No Expander FRU image I2C EEPROM No Memory Riser Mem FRU image I2C EEPROM No MEM VDDQ Regulators OTP(one time No programmable) System Memory RAM Yes FRU Firmware that configures PEX switch ports and feature support Firmware Expander Logging Storage during run time FRU FRU Operational parameters System OS RAM Item How is data input to this memory? How is this memory write protected? Planer PBG Internal CMOS NVRAM BIOS N/A - BIOS only control BIOS SPI Flash SPI interface via iDRAC Software write protected iDRAC SPI Flash SPI interface via iDRAC Embedded iDRAC subsystem firmware actively controls sub area based write protection as needed. IDRAC SDRAM Video Interface N/A - Embedded iDRAC video subsystem only BMC EMMC NAND Flash interface via iDRAC Embedded FW write protected CPU Vcore and VSA Regulators Once values are loaded into register space a cmd writes to nvram. There are passwords for different sections of the register space System CPLD OTP(one time programmable) at factory N/A - Factory only control TPM Data is pre-programmed by vendor. Software write protected Keys are updated using TPM-enabled operating systems. Power Supplies

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Active I/O Risers
I/O Riser FRU image
I2C EEPROM
No
FRU
Configuration image
EEPROM
No
Firmware that configures PEX
switch ports and feature support
12GB Daughter Card (Performance or Unified)
Flash memory
Flash
No
Firmware
Expander NVRAM
NVRAM
No
Expander Logging Storage during
run time
Expander FRU image
I2C EEPROM
No
FRU
Memory Riser
Mem FRU image
I2C EEPROM
No
FRU
MEM VDDQ Regulators
OTP(one time
programmable)
No
Operational parameters
System Memory
RAM
Yes
System OS RAM
Item
How is data input to this memory?
How is this memory write protected?
Planer
PBG Internal CMOS NVRAM
BIOS
N/A – BIOS only control
BIOS SPI Flash
SPI interface via iDRAC
Software write protected
iDRAC SPI Flash
SPI interface via iDRAC
Embedded iDRAC subsystem firmware actively
controls sub area based write protection as
needed.
IDRAC SDRAM
Video Interface
N/A – Embedded iDRAC video subsystem only
BMC EMMC
NAND Flash interface via iDRAC
Embedded FW write protected
CPU Vcore and VSA
Regulators
Once values are loaded into register
space a cmd writes to nvram.
There are passwords for different sections of the
register space
System CPLD
OTP(one time programmable) at
factory
N/A – Factory only control
TPM
Data is pre-programmed by vendor.
Keys are updated using TPM-enabled
operating systems.
Software write protected
Power Supplies