Foxconn A7VA English Manual. - Page 39
Memory Configuration
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Memory Configuration CMOS Setup Utility - Copyright (C) 1985-2008, American Megatrends, Inc. Memory Configuration �M��e��m��o�r�y��C�o��n�fi�g�u��ra��ti�o�n� Help Item Bank Interleaving [Disabled] Enable bank memory �C�h�a�n�ne�l�I�nt�e�rl�e�av�i�ng E�n�a�b�le�d I�n�te�rl�e�a�vi�n�g�� �E�n�a�b�l�e�C�l�o�c�k�t�o�A�l�l �D�IM��M�s D�i�s�a�b�le�d�] �M�e�m��C�l�k�T�r�is�t�a�te��C�3�/A��LT��V�ID D�i�s�a�b�le�d�] Memory Hole Remapping [Enabled]�� �D�C�T�U�n�g�an�g�e�d�M�o�d�e A�lw�a�ys�] �P�o�w�er�D�o�w�n��E�na�b�le E�na�b�le�d�] Power Down Mode [Channel] 3 Move Enter:Select +/-/:Value F10:Save ESC:Exit F1:General Help F9:Optimized Defaults ► Bank Interleaving Interleaving allows banks of SDRAM to alternate their refresh and access cycles. One bank will undergo its refresh cycle while another is being accessed. This improves memory performance by masking the refresh cycles of each memory bank. However, bank interleaving only works if the addresses requested consecutively are not in the same bank. ► Channel Interleaving Dual channel (Interleaved) mode offers the highest throughput for real world applications. Dual channel mode is enabled when the installed memory capacities of both DIMM channels are equal. If different speed DIMMs are used between channels, the slowest memory timing will be used. To achieve Dual Channel Interleaving mode, the following conditions must be met: Matched DIMM configuration in each channel Same Density (128MB, 256MB, 512MB, etc.) Matched in both Channel 0 and Channel 1 memory channels ► Enable Clock to All DIMMs This setting is to control EMI. When disabled, the system will turn off clock on the empty DIMM slots and to reduce EMI (Electro-Magnetic Interference). ► MemClk Tristate C3/ALTVID Enables the DDR memory clocks to be tristated when alternate VID mode is enabled. ► Memory Hole Remapping This item is used to enable/disable memory remapping around memory hole. PCI doesn't actually care much which addresses are used, but by convention the PC platform puts them at the top of the 32-bit address space. For many years it wasn't possible or practical to put that much RAM into a PC. But now it is, so it's up to the memory controller and host bridge to figure out what to do. Many systems cause that high RAM to simply be ignored, 32