Gigabyte GA-7PESH2 Manual - Page 56

DIMM Information

Page 56 highlights

2-3-1-2 DIMM Information DIMM Information: DIMM Group: CPU Socket 0/1 DIMM Information CPU Socket 0: DDR3_P0_A0/DDR3_P0_A1/DDR3_P0_B0/DDR3_P0_B1 Status DDR3_P0_C0/DDR3_P0_C1/DDR3_P0_D0/DDR3_P0_D1 Status The size of memory installed on each of the DDR3 slots. CPU Socket 1: DDR3_P0_E0/DDR3_P0_E1/DDR3_P0_F0/DDR3_P0_F1 Status DDR3_P0_G0/DDR3_P0_G1/DDR3_P0_H0/DDR3_P0_H1 Status The size of memory installed on each of the DDR3 slots. To clear ECC Flag When DDR3 Channel is maskoff after ECC multibit errors, it is required to clear ECC flag to make masked off channels be available. BIOS Setup - 56 -

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BIOS Setup
- 56 -
2-3-1-2 DIMM Information
DIMM Information:
DIMM Group: CPU Socket 0/1 DIMM Information
CPU Socket 0:
DDR3_P0_A0/DDR3_P0_A1/DDR3_P0_B0/DDR3_P0_B1 Status
DDR3_P0_C0/DDR3_P0_C1/DDR3_P0_D0/DDR3_P0_D1 Status
The size of memory installed on each of the DDR3 slots.
CPU Socket 1:
DDR3_P0_E0/DDR3_P0_E1/DDR3_P0_F0/DDR3_P0_F1 Status
DDR3_P0_G0/DDR3_P0_G1/DDR3_P0_H0/DDR3_P0_H1 Status
The size of memory installed on each of the DDR3 slots.
To clear ECC Flag
When DDR3 Channel is maskoff after ECC multibit errors, it is required to clear ECC flag to make
masked off channels be available.