HP ML150 ISS Technology Update, Volume 7, Number 8 - Page 3

ISS Technology Update Volume 7, Number 8 Additional resources For additional information on the topics discussed in this article, visit: Resource "The AMD processor roadmap for industry standard servers, 5th edition" technology brief "Intel processor roadmap for industry standard servers, 8th edition" technology brief URL http://h20000.www2.hp.com/bc/docs/support/SupportMa nual/c00428708/c00428708.pdf http://h20000.www2.hp.com/bc/docs/support/SupportMa nual/c00164255/c00164255.pdf Optimizing the performance of multi-core processors As processor vendors stretch the boundaries of physics to increase the number of cores on a single die, small-to-medium businesses and enterprise customers need to have a strategy to fully utilize the available cores. By all accounts, the trend to increase the number of cores per chip is irreversible because single-core CPUs use more power to achieve the performance levels of multi-core CPUs. Multi-core CPUs are designed to stay busier and operate at a lower frequency than a single-core processor which results in higher performance per watt. The power savings and performance improvements of multi-core technology are essential to the evolution of the entire computer industry. Key technologies that enable customers to take advantage of multi-core CPUs include virtualization and parallel processing. Virtualization technology transforms a single physical server into multiple virtual machines (VMs), allowing the server's physical resources (memory space and I/O devices) to service multiple guest operating systems. In doing so, virtualization technology increases hardware utilization, thereby lowering the total cost of ownership of servers and reducing the number of servers required. In parallel processing, multithreaded applications are executed in parallel on multiple cores. The availability of multi-threaded applications has been delayed by the changes required from the software programmers and vendors. Programmers must adopt parallelization techniques and must recode existing applications or code new ones from scratch. Software vendors must consider new business models other than the traditional method of charging customers a license fee for each server or processor that runs an application. These factors may have slowed the development of multi-threaded software, but they are not slowing down processor vendors-quad-core CPUs are on the market now and massive multi-core CPUs (with 16+ cores) will be available in a few years. Customers have at least two options in instances where they cannot use all of the available cores. One option is to shut down one or more cores and allocate that power to the remaining cores. It is more energy efficient to speed up the remaining cores while staying within the processor's thermal design power (TDP). Another option is to reduce the processor's power consumption to match the application requirements. If customers choose to reduce processor power use, they should be aware that the potential energy savings may be negated by the increased inefficiency of the power supply at decreased loads. This tactic requires power supplies that are efficient at lower loads. By using a BIOS setup option or an OS boot-loader option, customers may statically choose to disable some of the cores within a multi-core CPU at boot time. An operating system or a virtual machine manager (VMM), such as hypervisor, may be used to dynamically disable processor cores and readjust processor P-states (performance states) to appropriately reallocate power to the remaining cores. Additional resources For additional information on the topics discussed in this article, visit the following: Resource "Integrated hypervisor virtualization technologies in HP BladeSystem ProLiant server blades and ProLiant servers" technology brief URL http://h20000.www2.hp.com/bc/docs/support/SupportManual/c 01518167/c01518167.pdf 3