HP Vectra XU 6/XXX HP Vectra XU - Guide to Optimizing Performance, Not Orderab - Page 62

The MESI Protocol, Bus Snooping

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2 Technical Reference The Intel Pentium Pro Processor If another device in your PC requests this data from memory, the Pentium Pro processor must be able to intercept the request so that it can supply the correct version of the data. To meet this requirement, the Pentium Pro processor uses two cache coherency mechanisms: the MESI (Modified, Exclusive, Shared, Invalid) protocol; and bus snooping. The MESI Protocol The MESI protocol defines the status of data in the cache using four states: Ì Modified - the data is valid, but different to that in memory (the data in memory is invalid) Ì Exclusive - the data is valid and contained in one processor cache only Ì Shared - the data is valid and copies are stored in the caches of different processors Ì Invalid - the data is not valid. Data is stored in cache memories as cache lines of 32-bytes. Associated with each cache line are two status bits which define the MESI state of the cache line. Bus Snooping The Pentium Pro processor monitors accesses to memory by other PC devices (including a second processor, if installed) through bus snooping. This involves intercepting the memory addresses issued by other devices and comparing them with the contents of its cache memories. If bus snooping produces a cache hit, the action taken by the processor will depend on the MESI status of the cache line that produced the hit: for modified cache lines the processor will intervene to update the copy held in main memory; for shared or exclusive cache lines, the processor will need to modify the MESI state of the cache line. 56 English

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2
Technical Reference
The Intel Pentium Pro Processor
56
English
If another device in your PC requests this data from memory, the
Pentium Pro processor must be able to intercept the request so that it
can supply the correct version of the data. To meet this requirement,
the Pentium Pro processor uses two cache coherency mechanisms: the
MESI (Modified, Exclusive, Shared, Invalid) protocol; and bus
snooping.
The MESI Protocol
The MESI protocol defines the status of data in the cache using four
states:
Modified
—
the data is valid, but different to that in memory (the
data in memory is invalid)
Exclusive
—
the data is valid and contained in one processor cache
only
Shared
—
the data is valid and copies are stored in the caches of
different processors
Invalid
—
the data is not valid.
Data is stored in cache memories as cache lines of 32-bytes. Associated
with each cache line are two status bits which define the MESI state of
the cache line.
Bus Snooping
The Pentium Pro processor monitors accesses to memory by other PC
devices (including a second processor, if installed) through bus
snooping. This involves intercepting the memory addresses issued by
other devices and comparing them with the contents of its cache
memories.
If bus snooping produces a cache hit, the action taken by the processor
will depend on the MESI status of the cache line that produced the hit:
for modified cache lines the processor will intervene to update the
copy held in main memory; for shared or exclusive cache lines, the
processor will need to modify the MESI state of the cache line.