IBM IC25N040ATCS04 Hard Drive Specifications - Page 57

Signal descriptions, DD00-DD15, DA00-DA02, RESET, INTRQ, IOCS16 - 0 driver

Page 57 highlights

7.4 Signal descriptions DD00-DD15 A 16-bit bi-directional data bus between the host and the drive. The lower 8 lines, DD00-07, are used for Register and ECC access. All 16 lines, DD00-15, are used for data transfer. These are 3-state lines with 24 mA current sink capability. DA00-DA02 These are addresses used to select the individual register in the drive. CS0The chip select signal generated from the Host address bus. When active, one of the Command Block Registers [Data, Error (Features when written), Sector Count, Sector Number, Cylinder Low, Cylinder High, Drive/Head and Status (Command when written) register] can be selected. CS1The chip select signal generated from the Host address bus. When active, one of the Control Block Registers [Alternate Status (Device Control when written) and Drive Address register] can be selected. RESETThis line is used to reset the drive. It shall be kept at a Low logic state during power up and kept High thereafter. DIOWThe rising edge of this signal holds data from the data bus to a register or data register of the drive. DIORWhen this signal is low, it enables data from a register or data register of the drive onto the data bus. The data on the bus shall be latched on the rising edge of DIOR-. INTRQ The interrupt is enabled only when the drive is selected and the host activates the -IEN bit in the Device Control Register. Otherwise, this signal is in high impedance state regardless of the state of the IRQ bit. The interrupt is set when the IRQ bit is set by the drive CPU. The IRQ is reset to zero by a host read of the status register or a write to the Command Register. This signal is a 3-state line with 24 mA of sink capability. IOCS16A signal indicating to the host that a 16-bit wide data register has been addressed and that the drive is prepared to send or receive a 16-bit wide data word. This signal is an Open-Drain output with 24 mA sink capability and an external resistor is needed to pull this line to 5 volts. DASPThis is a time-multiplexed signal which indicates that a drive is active or that device 1 is present. This signal is driven by an Open-Drain driver and internally pulled up to 5 volts through a 10 kΩ resistor. During a Power-On initialization or after RESET- is negated, DASP- shall be asserted by Device 1 within 400 ms to indicate that device 1 is present. Device 0 shall allow up to 450 ms for device 1 to assert DASP-. If device 1 is not present, device 0 may assert DASP- to drive an LED indicator. The DASP- signal shall be negated following acceptance of the first valid command by device 1. Anytime after negation of DASP-, either drive may assert DASP- to indicate that a drive is active. Travelstar 60GH & 40GN hard disk drive specifications 44

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7.4 Signal descriptions
DD00–DD15
A 16-bit bi-directional data bus between the host and the drive. The lower 8 lines, DD00-07, are used
for Register and ECC access. All 16 lines, DD00–15, are used for data transfer. These are 3-state
lines with 24 mA current sink capability.
DA00–DA02
These are addresses used to select the individual register in the drive.
CS0-
The chip select signal generated from the Host address bus. When active, one of the Command Block
Registers [Data, Error (Features when written), Sector Count, Sector Number, Cylinder Low, Cylinder
High, Drive/Head and Status (Command when written) register] can be selected.
CS1-
The chip select signal generated from the Host address bus. When active, one of the Control Block
Registers [Alternate Status (Device Control when written) and Drive Address register] can be
selected.
RESET-
This line is used to reset the drive. It shall be kept at a Low logic state during power up and kept High
thereafter.
DIOW-
The rising edge of this signal holds data from the data bus to a register or data register of the drive.
DIOR-
When this signal is low, it enables data from a register or data register of the drive onto the data bus.
The data on the bus shall be latched on the rising edge of DIOR-.
INTRQ
The interrupt is enabled only when the drive is selected and the host activates the -IEN bit in the
Device Control Register. Otherwise, this signal is in high impedance state regardless of the state of
the IRQ bit. The interrupt is set when the IRQ bit is set by the drive CPU. The IRQ is reset to zero by a
host read of the status register or a write to the Command Register. This signal is a 3-state line with
24 mA of sink capability.
IOCS16-
A signal indicating to the host that a 16-bit wide data register has been addressed and that the drive is
prepared to send or receive a 16-bit wide data word. This signal is an Open-Drain output with 24 mA
sink capability and an external resistor is needed to pull this line to 5 volts.
DASP-
This is a time-multiplexed signal which indicates that a drive is active or that device 1 is present. This
signal is driven by an Open-Drain driver and internally pulled up to 5 volts through a 10 k
resistor.
During a Power-On initialization or after RESET- is negated, DASP- shall be asserted by Device 1
within 400 ms to indicate that device 1 is present. Device 0 shall allow up to 450 ms for device 1 to
assert DASP-. If device 1 is not present, device 0 may assert DASP- to drive an LED indicator. The
DASP- signal shall be negated following acceptance of the first valid command by device 1. Anytime
after negation of DASP-, either drive may assert DASP- to indicate that a drive is active.
Travelstar 60GH & 40GN hard disk drive specifications
44