Icom IC-M604A Service Manual - Page 13

Dsc Circuits

Page 13 highlights

4-3-4 VCO CIRCUIT (MAIN UNIT) • TX-VCO/CHANNEL 70-VCO (RX) CIRCUITS The VCO outputs from TX-VCO/CHANNEL 70-VCO (Q18) are amplified at the buffer amplifiers (Q19 and Q27), and are applied to the TX/RX switch circuit (D42, D43). The receiver LO signal is applied to the 1st mixer circuit for CHANNEL 70 (D21, L48, L49) passing through a low-pass filter (L51, L52, C150-C152), and the transmitter signal is applied to the pre-drive amplifier (Q28). A portion of the VCO output signal is re-applied to the PLL IC (IC12, pin 2) via the buffer amplifier (Q15). • OTHER CHANNELS-VCO (RX) CIRCUITS The VCO outputs from OTHER CHANNELS-VCO (Q12) are amplified at the buffer amplifiers (Q13 and Q23). The receiver LO signal is applied to the 1st mixer circuit for OTHER CHANNELS (D11, L18, L19) passing through a low-pass filter (L21, L22, C52-C54). A portion of the VCO output signal is re-applied to the PLL IC (IC12, pin 2 or pin 19) via the buffer amplifier (Q19). 4-4 DSC CIRCUITS 4-4-1 DSC MODULATION CIRCUIT (LOGIC, AF AND MAIN UNITS) The ATIS signal from the CPU (LOGIC unit; IC1, pin 117) is applied to the buffer amplifier (AF unit; Q18) as "DSC" signal. The signal passes through the analog switch (AF unit; IC7, pin 1), and then applied to IDC amplifier (AF unit; IC8a). Then, the amplified signal is applied to the transmitter circuit. The signalis passed through the splatter filter (AF unit; IC8b) to suppress unwanted 3 kHz or higher signals. The filtered signals are then applied to the TX modulation circuit via the D/A converter IC (MAIN unit; IC15, pins 11, 12) as a DSC modulation signal "MOD". 4-5 LOGIC CIRCUITS 4-5-1 LOGIC UNIT • CPU IC1 is a 8 bit single chip micro-computer, which contains LCD driver, serial I/O, timer, A/D converter, programmable I/O, ROM and RAM. • SYSTEM CLOCK CIRCUIT X1 is a crystal oscillator, which oscillates 9.8304 MHz system clock for the main CPU (IC1). • RESET CIRCUIT IC2 is a reset IC, which outputs a reset signal ("LOW" pulse) to main CPU (IC1, pin 79) when turning transceiver power ON. • PLL CIRCUIT VCO Loop filter Q18, D37, D39, D40 Buffer Q19 Buffer Q27 Buffer Q15 D42 to 1st mixer circuit D43 to transmitter circuit IC12 (PLL IC) 8 X2 15.3 MHz 16 30.6 MHz signal 17 to the FM IF IC 2 (IC1, pin 2) Q16 Phase detector Programmable counter Prescaler Programmable divider Shift register/ data latch 2 3 PSTB 4 PCK 5 PDATA • DSC CIRCUIT "DSC" signal from the CPU (LOGIC board; IC1, pin 117) Q18 Buff. amp. IC7 analog switch IC8a IDC amp. LPF IC8b D/A convertor IC15 to VCO circuit 4 - 5

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4-3-4 VCO CIRCUIT (MAIN UNIT)
• TX-VCO/CHANNEL 70-VCO (RX) CIRCUITS
The VCO outputs from TX-VCO/CHANNEL 70-VCO (Q18)
are amplified at the buffer amplifiers (Q19 and Q27), and
are applied to the TX/RX switch circuit (D42, D43). The
receiver LO signal is applied to the 1st mixer circuit for
CHANNEL 70
(D21, L48, L49) passing through a low-pass
filter (L51, L52, C150–C152), and the transmitter signal is
applied to the pre-drive amplifier (Q28). A portion of the
VCO output signal is re-applied to the PLL IC (IC12, pin 2)
via the buffer amplifier (Q15).
• OTHER CHANNELS-VCO (RX) CIRCUITS
The VCO outputs from OTHER CHANNELS-VCO (Q12) are
amplified at the buffer amplifiers (Q13 and Q23). The receiv-
er LO signal is applied to the 1st mixer circuit for OTHER
CHANNELS (D11, L18, L19) passing through a low-pass
filter (L21, L22, C52–C54). A portion of the VCO output sig-
nal is re-applied to the PLL IC (IC12, pin 2 or pin 19) via the
buffer amplifier (Q19).
4-4 DSC CIRCUITS
4-4-1
DSC MODULATION CIRCUIT
(LOGIC, AF AND MAIN UNITS)
The ATIS signal from the CPU (LOGIC unit; IC1, pin 117)
is applied to the buffer amplifier (AF unit; Q18) as “DSC”
signal. The signal passes through the analog switch (AF
unit; IC7, pin 1), and then applied to IDC amplifier (AF unit;
IC8a). Then, the amplified signal is applied to the transmitter
circuit.
Loop
filter
X2
15.3 MHz
Shift register/
data latch
IC12 (PLL IC)
Prescaler
Phase
detector
Programmable
counter
Programmable
divider
3
4
5
2
8
2
PSTB
PCK
PDATA
30.6 MHz signal
to the FM IF IC
(IC1, pin 2)
Q27
Q15
Q19
to transmitter circuit
to 1st mixer circuit
D42
D43
17
Q16
16
Q18, D37, D39, D40
VCO
Buffer
Buffer
Buffer
• PLL CIRCUIT
Buff.
amp.
Q18
"DSC" signal from the CPU
(LOGIC board; IC1, pin 117)
IC7
analog
switch
IDC
amp.
IC8a
LPF
IC8b
D/A
convertor
IC15
to VCO circuit
• DSC CIRCUIT
The signalis passed through the splatter filter (AF unit; IC8b)
to suppress unwanted 3 kHz or higher signals. The filtered
signals are then applied to the TX modulation circuit via the
D/A converter IC (MAIN unit; IC15, pins 11, 12) as a DSC
modulation signal “MOD”.
4-5 LOGIC CIRCUITS
4-5-1 LOGIC UNIT
• CPU
IC1 is a 8 bit single chip micro-computer, which contains
LCD driver, serial I/O, timer, A/D converter, programmable
I/O, ROM and RAM.
• SYSTEM CLOCK CIRCUIT
X1 is a crystal oscillator, which oscillates 9.8304 MHz sys-
tem clock for the main CPU (IC1).
• RESET CIRCUIT
IC2 is a reset IC, which outputs a reset signal (“LOW” pulse)
to main CPU (IC1, pin 79) when turning transceiver power
ON.
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