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Intel BLKDP965LTCK Product Specification - Page 2

Revision History

UPC - 200001254772

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Revision History Revision -001 -002 Revision History First release of the Intel® Desktop Board DP965LT Technical Product Specification. Second release of the Intel® Desktop Board DP965LT Technical Product Specification. Changes in the following areas: • Updated supported processors in Table 1 and Section 1.3. • Updated supported total memory in Table 1 and Section 1.4. • Listed specific SPD timings for DDR2 800 DIMMs in Section 1.4. • Updated supported memory configurations in Table 3. • Added Integrator's Note to Section 1.4.1 regarding requirement that Channel A, DIMM 0 always be populated. • Revisions to Section 1.7, Audio Subsystem, to clarify audio jack retasking support. • Added a new subsection, DC Loading, within Section 2.10. New subsection includes Table 30, DC Loading Characteristics. • Updated component maximum temperature values in Table 32. • Added Chapter 5. Moved battery disposal information from Chapter 1 to Chapter 5. Moved regulatory compliance information from Chapter 2 to Chapter 5. Date June 2006 September 2006 ii

Section	Page
Intel® Desktop Board DP965LT Technical Product Specification	1
Revision History	2
Disclaimer	3
Preface	5
Intended Audience	5
What This Document Contains	5
Typographical Conventions	5
Contents	7
1 Product Description	11
1.1 Overview	12
1.1.1 Feature Summary	12
1.1.2 Board Layout	14
1.1.3 Block Diagram	16
1.2 Online Support	17
1.3 Processor	17
1.4 System Memory	18
1.4.1 Memory Configurations	20
1.5 Intel® P965 Express Chipset	26
1.5.1 USB	26
1.5.2 Serial ATA Interfaces	26
1.5.3 Parallel IDE Interface	27
1.5.4 Real-Time Clock, CMOS SRAM, and Battery	28
1.6 Legacy I/O Controller	28
1.6.1 Serial Port	28
1.6.2 Parallel Port	28
1.6.3 Diskette Drive Controller	29
1.6.4 Keyboard and Mouse Interface	29
1.7 Audio Subsystem	30
1.7.1 Audio Subsystem Software	30
1.7.2 Audio Connectors and Headers	31
1.8 LAN Subsystem	32
1.8.1 Intel® 82566DC Gigabit Ethernet Controller	32
1.8.2 LAN Subsystem Software	33
1.8.3 RJ-45 LAN Connector with Integrated LEDs	33
1.9 Hardware Management Subsystem	34
1.9.1 Hardware Monitoring and Fan Control	34
1.9.2 Fan Monitoring	34
1.9.3 Chassis Intrusion and Detection	34
1.9.4 Thermal Monitoring	35
1.10 Power Management	36
1.10.1 ACPI	36
1.10.2 Hardware Support	38
2 Technical Reference	43
2.1 Memory Map	43
2.1.1 Addressable Memory	43
2.2 DMA Channels	45
2.3 Fixed I/O Map	46
2.4 PCI Configuration Space Map	47
2.5 Interrupts	48
2.6 PCI Interrupt Routing Map	49
2.7 Connectors and Headers	50
2.7.1 Back Panel Connectors	51
2.7.2 Component-side Connectors and Headers	52
2.8 Jumper Block	60
2.9 Mechanical Considerations	61
2.9.1 Form Factor	61
2.9.2 I/O Shield	62
2.10 Electrical Considerations	63
2.10.1 DC Loading	63
2.10.2 Fan Header Current Capability	63
2.10.3 Add-in Board Considerations	64
2.10.4 Power Supply Considerations	64
2.11 Thermal Considerations	65
2.12 Reliability	67
2.13 Environmental	67
3 Overview of BIOS Features	69
3.1 Introduction	69
3.2 BIOS Flash Memory Organization	70
3.3 Resource Configuration	70
3.3.1 PCI Autoconfiguration	70
3.3.2 PCI IDE Support	71
3.4 System Management BIOS (SMBIOS)	71
3.5 Legacy USB Support	72
3.6 BIOS Updates	72
3.6.1 Language Support	73
3.6.2 Custom Splash Screen	73
3.7 BIOS Recovery	73
3.8 Boot Options	74
3.8.1 CD-ROM Boot	74
3.8.2 Network Boot	74
3.8.3 Booting Without Attached Devices	74
3.8.4 Changing the Default Boot Device During POST	74
3.9 Adjusting Boot Speed	75
3.9.1 Peripheral Selection and Configuration	75
3.9.2 BIOS Boot Optimizations	75
3.10 BIOS Security Features	76
4 Error Messages and Beep Codes	77
4.1 Speaker	77
4.2 BIOS Beep Codes	77
4.3 BIOS Error Messages	77
4.4 Port 80h POST Codes	78
5 Regulatory Compliance and Battery Disposal Information	83
5.1 Regulatory Compliance	83
5.1.1 Safety Regulations	83
5.1.2 European Union Declaration of Conformity Statement	84
5.1.3 Product Ecology Statements	86
5.1.4 EMC Regulations	89
5.1.5 Product Certification Markings (Board Level)	90