Intel D845EPT2 D845EPT2_D845EBG2_TechProdSpec. - Page 112

Chipset Configuration Submenu

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Intel Desktop Board D845EBG2/D845EPT2 Technical Product Specification 4.4.9 Chipset Configuration Submenu To access this menu, select Advanced on the menu bar and then Chipset Configuration. Maintenance Main Advanced Security Power PCI Configuration Boot Configuration Peripheral Configuration IDE Configuration Diskette Configuration Event Log Configuration Video Configuration USB Configuration Chipset Configuration Boot The submenu represented in Table 71 is for configuring the chipset options. Exit Table 71. Chipset Configuration Submenu Feature ISA Enable Bit PCI Latency Timer Extended Configuration SDRAM Frequency SDRAM Timing Control Options • Enabled (default) • Disabled • 32 (default) • 64 • 96 • 128 • 160 • 192 • 224 • 248 • Default (default) • User Defined • Auto (default) • 200 MHz • 266 MHz • Auto (default) • Manual - Aggressive • Manual - User Defined Description When set to Enable, a PCI-to-PCI bridge will only recognize I/O addresses that do not alias to an ISA range (within the bridge's assigned I/O range). Allows you to control the time (in PCI bus clock cycles) that an agent on the PC bus can hold the bus when another agent has requested the bus. Allows the setting of extended configuration options. Allows override of detected memory frequency value. NOTE: If SDRAM Frequency is changed, you must reboot for the change to take effect. After changing this setting and rebooting, the System Memory Speed parameter in the Main menu will reflect the new value. Auto = Timings will be programmed according to the memory detected. Manual - Aggressive = Selects most aggressive user-defined timings. Manual - User Defined = Allows manual override of detected SDRAM settings. continued 112

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Intel Desktop Board D845EBG2/D845EPT2 Technical Product Specification
112
4.4.9
Chipset Configuration Submenu
To access this menu, select Advanced on the menu bar and then Chipset Configuration.
Maintenance
Main
Advanced
Security
Power
Boot
Exit
PCI Configuration
Boot Configuration
Peripheral Configuration
IDE Configuration
Diskette Configuration
Event Log Configuration
Video Configuration
USB Configuration
Chipset Configuration
The submenu represented in Table 71 is for configuring the chipset options.
Table 71.
Chipset Configuration Submenu
Feature
Options
Description
ISA Enable Bit
•
Enabled (default)
•
Disabled
When set to
Enable
, a PCI-to-PCI bridge will only
recognize I/O addresses that do not alias to an ISA
ra
n
ge (within the bridge
’
s assigned I/O range).
PCI Latency Timer
•
32 (default)
•
64
•
96
•
128
•
160
•
192
•
224
•
248
Allows you to control the time (in PCI bus clock
cycles) that an agent on the PC bus can hold the bus
when another agent has requested the bus.
Extended Configuration
•
Default (default)
•
User Defined
Allows the setting of extended configuration options.
SDRAM Frequency
•
Auto (default)
•
200 MHz
•
266 MHz
Allows override of detected memory frequency value.
NOTE:
If SDRAM Frequency is changed, you must
reboot for the change to take effect.
After changing
this setting and rebooting, the System Memory
Speed parameter in the Main menu will reflect the
new value.
SDRAM Timing Control
•
Auto (default)
•
Manual
–
Aggressive
•
Manual
–
User Defined
Auto
= Timings will be programmed according to the
memory detected.
Manual –
Aggressive
= Selects most aggressive
user-defined timings.
Manual
–
User Defined
= Allows manual override of
detected SDRAM settings.
continued