Intel MFSYS25V2 Technical Product Specification - Page 44

Intel® Compute Module MFS5520VI TPS

Appendix B: Integrated BMC Sensor Tables

Revision 1.5

Intel order number: E64311-007

37

Fault LED

This column indicates whether an assertion of an event lights the front panel fault LED. The

Integrated BMC aggregates all fault sources (including outside sources such as the BIOS) such

that the LED will be lit as long as any source indicates that a fault state exists. The Integrated

BMC extinguishes the fault LED when all sources indicate no faults are present.

Sensor Rearm

The rearm is a request for the event status for a sensor to be rechecked and updated upon a

transition between good and bad states. Rearming the sensors can be done manually or

automatically. The following abbreviations are used in the column:

±

‘A’: Auto rearm

±

‘M’: Manual rearm

Readable

Some sensors are used simply to generate events into the System Event Log. The Watchdog

timer sensor is one example. These sensors operate by asserting and then immediately de-

asserting an event. Typically the SDRs for such sensors are defined such that only the assertion

causes an event message to be deposited in the SEL. Reading such a sensor produces no

useful information and is marked as ‘No’ in this column. Note that some sensors may

actually be

unreadable in that they return an error code in response to the IPMI

Get Sensor Reading

command. These sensors are represented by type 3 SDR records.

Standby

Some sensors operate on standby power. These sensors may be accessed and/or generate

events when the compute module payload power is off, but standby power is present.

Table 17. MFS5520VI Sensors

Sensor Name

Sensor #

Sensor Type

Event/Reading

Type

Event Offset

Triggers

Contrib. To

System Status

Rearm

Stand-by

00 - Power down

04 - A/C lost

05 - Soft power

control failure

Power Unit Status

01h

Power Unit

09h

Sensor

Specific

6Fh

06 - Power unit

failure

OK

A

X

00 - Timer

expired, status

only

01 - Hard reset

02 - Power down

Watchdog

03h

Watchdog 2

23h

Sensor

Specific

6Fh

03 - Power cycle

OK

A

X

Section	Page
Revision History	2
Table of Contents	3
List of Figures	5
List of Tables	6
1. Introduction	8
1.1 Chapter Outline	8
1.2 Intel® Compute Module Use Disclaimer	8
2. Product Overview	9
2.1 Intel® Compute Module MFS5520VI Feature Set	9
2.2 Compute Module Layout	10
2.2.1 Connector and Component Locations	10
2.2.2 External I/O Connector Locations	10
2.2.3 Compute Module Mechanical Drawings	12
3. Functional Architecture	13
3.1 Intel® Xeon® processor	14
3.1.1 Processor Support	14
3.1.1.1 Processor Population Rules	14
3.1.2 Mixed Processor Configuration	14
3.1.3 Turbo Mode	16
3.1.4 Hyper-Threading	16
3.1.5 Intel® QuickPath Interconnect	16
3.1.6 Unified Retention System Support	17
3.2 Memory Subsystem	18
3.2.1 Intel® QuickPath Memory Controller	18
3.2.1.1 Intel® Compute Module MFS5520VI Supported Memory	18
3.2.2 Publishing Compute Module Memory	18
3.2.3 Memory Map and Population Rules	19
3.2.3.1 Memory Subsystem Nomenclature	19
3.2.4 Memory RAS	20
3.2.4.1 RAS Features	20
3.2.4.2 Channel Independent Mode	20
3.2.4.3 Channel Mirroring Mode	20
3.2.4.3.1 Minimum DDR3 DIMM Population for Channel Mirroring	21
3.2.4.3.2 Mirroring DIMM Population Rules Variance across Nodes	21
3.2.5 Memory Upgrade Rules	22
3.3 Intel® 5520 Chipset IOH	24
3.4 Intel® 82801JR I/O Controller Hub (ICH10R)	24
3.4.1 PCI Subsystem	25
3.4.2 USB 2.0 Support	25
3.5 Integrated Baseboard Management Controller	26
3.5.1 Floppy Disk Controller	28
3.5.2 Keyboard and Mouse Support	28
3.5.3 Wake-up Control	28
3.6 Video Support	28
3.6.1 Video Modes	28
3.7 Network Interface Controller (NIC)	29
3.7.1 Direct Cache Access (DCA)	29
3.8 Intel® Virtualization Technology for Directed I/O (Intel® VT-d)	29
4. Connector/Header Locations and Pin-outs	30
4.1 Board Connector Information	30
4.2 Power Connectors	30
4.3 I/O Connector Pin-out Definition	31
4.3.1 VGA Connector	31
4.3.2 I/O Mezzanine Card Connector	31
4.3.3 Midplane Signal Connector	35
4.3.4 Serial Port Connector	36
4.3.5 USB 2.0 Connectors	36
5. Jumper Block Settings	38
5.1 Recovery Jumper Blocks	38
5.1.1 CMOS Clear and Password Clear Usage Procedure	39
5.1.2 Integrated BMC Force Update Procedure	39
5.1.3 Integrated BMC Initialization	40
6. Product Regulatory Requirements	41
6.1 Product Regulatory Requirements	41
6.2 Product Regulatory Compliance and Safety Markings	41
6.3 Product Environmental/Ecology Requirements	41
Appendix A: Integration and Usage Tips	42
Appendix B: Integrated BMC Sensor Tables	43
Appendix C: POST Error Messages and Handling	49
Appendix D: Supported Intel® Modular Server System	53
Glossary	54

Intel MFSYS25V2 Technical Product Specification - Page 44

Fault LED, Sensor Rearm, Readable, Standby - manual

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