Intel Q9400S Design Guidelines - Page 38

Thermal Management Logic and Thermal Monitor Feature

38

Thermal and Mechanical Design Guidelines

Once the processor has sufficiently cooled, and a minimum activation time has

expired, the operating frequency and voltage transition back to the normal system

operating point. Transition of the VID code will occur first, in order to insure proper

operation once the processor reaches its normal operating frequency. Refer to

Figure 8 for an illustration of this ordering.

Figure 8. Thermal Monitor 2 Frequency and Voltage Ordering

VID

Frequency

Temperature

T

TM2

f

MAX

f

TM2

VID

VID

TM2

PROCHOT#

Time

Refer to the datasheet

for further information on TM2.

4.2.3

Operation and Configuration

Thermal Monitor must be enabled to ensure proper processor operation.

The Thermal Control Circuit feature can be configured and monitored in a number of

ways. OEMs are required to enable the Thermal Control Circuit while using various

registers and outputs to monitor the processor thermal status. The Thermal Control

Circuit is enabled by the BIOS setting a bit in an MSR (model specific register).

Enabling the Thermal Control Circuit allows the processor to attempt to maintain a

safe operating temperature without the need for special software drivers or interrupt

handling routines. When the Thermal Control Circuit has been enabled, processor

power consumption will be reduced after the thermal sensor detects a high

temperature (i.e., PROCHOT# assertion). The Thermal Control Circuit and PROCHOT#

transitions to inactive once the temperature has been reduced below the thermal trip

point, although a small time-based hysteresis has been included to prevent multiple

PROCHOT# transitions around the trip point. External hardware can monitor

PROCHOT# and generate an interrupt whenever there is a transition from active-to-

inactive or inactive-to-active. PROCHOT# can also be configured to generate an

internal interrupt which would initiate an OEM supplied interrupt service routine.

Section	Page
1 Introduction	11
1.1 Document Goals and Scope	11
1.1.1 Importance of Thermal Management	11
1.1.2 Document Goals	11
1.1.3 Document Scope	12
1.2 References	13
1.3 Definition of Terms	14
2 Processor Thermal/Mechanical Information	17
2.1 Mechanical Requirements	17
2.1.1 Processor Package	17
2.1.2 Heatsink Attach	19
2.1.2.1 General Guidelines	19
2.1.2.2 Heatsink Clip Load Requirement	19
2.1.2.3 Additional Guidelines	20
2.2 Thermal Requirements	20
2.2.1 Processor Case Temperature	20
2.2.2 Thermal Profile	21
2.2.3 TCONTROL	23
2.3 Heatsink Design Considerations	24
2.3.1 Heatsink Size	25
2.3.2 Heatsink Mass	25
2.3.3 Package IHS Flatness	26
2.3.4 Thermal Interface Material	26
2.4 System Thermal Solution Considerations	27
2.4.1 Chassis Thermal Design Capabilities	27
2.4.2 Improving Chassis Thermal Performance	27
2.4.3 Summary	28
2.5 System Integration Considerations	28
3 Thermal Metrology	29
3.1 Characterizing Cooling Performance Requirements	29
3.1.1 Example	31
3.2 Processor Thermal Solution Performance Assessment	31
3.3 Local Ambient Temperature Measurement Guidelines	32
3.4 Processor Case Temperature Measurement Guidelines	34
4 Thermal Management Logic and Thermal Monitor Feature	35
4.1 Processor Power Dissipation	35
4.2 Thermal Monitor Implementation	35
4.2.1 PROCHOT# Signal	36
4.2.2 Thermal Control Circuit	36
4.2.2.1 Thermal Monitor	36
4.2.2.2 Thermal Monitor 2 (TM2)	37
4.2.3 Operation and Configuration	38
4.2.4 On-Demand Mode	39
4.2.5 System Considerations	39
4.2.6 Operating System and Application Software Considerations	40
4.2.7 THERMTRIP# Signal	40
4.2.8 Cooling System Failure Warning	40
4.2.9 Digital Thermal Sensor	41
4.2.10 Platform Environmental Control Interface (PECI)	42
5 Intel® Thermal/Mechanical Reference Design Information	43
5.1 ATX Reference Design Requirements	43
5.2 Validation Results for Reference Design	45
5.2.1 Heatsink Performance	45
5.2.2 Acoustics	46
5.2.3 Altitude	47
5.2.4 Reference Heatsink Thermal Validation	47
5.2.5 Fan Performance for Active Heatsink Thermal Solution	48
5.3 Environmental Reliability Testing	49
5.3.1 Structural Reliability Testing	49
5.3.1.1 Random Vibration Test Procedure	49
5.3.1.2 Shock Test Procedure	49
5.3.2 Power Cycling	51
5.3.3 Recommended BIOS/Processor/Memory Test Procedures	51
5.4 Material and Recycling Requirements	51
5.5 Safety Requirements	52
5.6 Geometric Envelope for Intel® Reference ATX Thermal Mechanical Design	52
5.7 Reference Attach Mechanism	53
5.7.1 Structural Design Strategy	53
5.7.2 Mechanical Interface to the Reference Attach Mechanism	54
6 Intel® Quiet System Technology (Intel® QST)	57
6.1 Intel® Quiet System Technology Algorithm	57
6.1.1 Output Weighting Matrix	58
6.1.2 Proportional-Integral-Derivative (PID)	58
6.2 Board and System Implementation of Intel® Quiet System Technology	60
6.3 Intel® QST Configuration and Tuning	62

Intel Q9400S Design Guidelines - Page 38

Operation and Configuration

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