Intel S2400LP Technical Product Specification - Page 32

Product Architecture Overview Intel®Server Boards S2400LP TPS The following are generic DIMM population requirements that generally apply to both the Intel® Server Board S2400LP  All DIMMs must be DDR3 DIMMs  Unbuffered DIMMs can be ECC or non-ECC.  Mixing of Registered and Unbuffered DIMMs is not allowed per platform.  Mixing of LRDIMM with any other DIMM type is not allowed per platform.  Mixing of DDR3 voltages is not validated within a socket or across sockets by Intel. If 1.35V (DDR3L) and 1.50V (DDR3) DIMMs are mixed, the DIMMs will run at 1.50V.  Mixing of DDR3 operating frequencies is not validated within a socket or across sockets by Intel. If DIMMs with different frequencies are mixed, all DIMMs will run at the common lowest frequency.  Quad rank RDIMMs are supported but not validated by Intel.  A maximum of 8 logical ranks (ranks seen by the host) per channel is allowed.  Mixing of ECC and non-ECC DIMMs is not allowed per platform. 3.3.2.3 Publishing System Memory  The BIOS displays the "Total Memory" of the system during POST if Display Logo is disabled in the BIOS setup. This is the total size of memory discovered by the BIOS during POST, and is the sum of the individual sizes of installed DDR3 DIMMs in the system.  The BIOS displays the "Effective Memory" of the system in the BIOS setup. The term Effective Memory refers to the total size of all DDR3 DIMMs that are active (not disabled) and not used as redundant units.  The BIOS provides the total memory of the system in the main page of the BIOS setup. This total is the same as the amount described by the first bullet above.  If Display Logo is disabled, the BIOS displays the total system memory on the diagnostic screen at the end of POST. This total is the same as the amount described by the first bullet above. 3.3.2.4 RAS Features The server board supports the following memory RAS modes:  Independent Channel Mode  Rank Sparing Mode  Mirrored Channel Mode  Lockstep Channel Mode Regardless of RAS mode, the requirements for populating within a channel given in the section 3.2.2 must be met at all times. Note that support of RAS modes that require matching DIMM population between channels (Mirrored and Lockstep) require that ECC DIMMs be populated. Independent Channel Mode is the only mode that supports non-ECC DIMMs in addition to ECC DIMMs. For RAS modes that require matching populations, the same slot positions across channels must hold the same DIMM type with regards to size and organization. DIMM timings do not have to match but timings will be set to support all DIMMs populated (that is, DIMMs with slower timings will force faster DIMMs to the slower common timing modes). Independent Channel Mode Channels can be populated in any order in Independent Channel Mode. All four channels may be populated in any order and have no matching requirements. All channels must run at the same interface frequency but individual channels may run at different DIMM timings (RAS latency, CAS Latency, and so forth). 18 Revision 1.0 Intel order number G52803-001