Intel S2600TP Technical Product Specification - Page 53

Technical Product Specification Memory Support support all DIMMs populated (that is, DIMMs with slower timings will force faster DIMMs to the slower common timing modes). 4.1.2 Memory RASM Features  DRAM Single Device Data Correction (SDDC): SDDC provides error checking and correction that protects against a single x4 DRAM device failure (hard-errors) as well as multi-bit faults in any portion of a single DRAM device on a DIMM (require lockstep mode for x8 DRAM device based DIMM).  Memory Disable and Map out for FRB: Allows memory initialization and booting to OS even when a memory fault occurs.  Data Scrambling with Command and Address: Scrambles the data with address and command in "write cycle" and unscrambles the data in "read cycle". This feature addresses reliability by improving signal integrity at the physical layer, and by assisting with detection of an address bit error.  DDR4 Command/Address Parity Check and Retry: DDR4 technology based CMD/ADDR parity check and retry with following attributes: o CMD/ADDR Parity error address logging o CMD/ADDR Retry  Intra-Socket Memory Mirroring: Memory Mirroring is a method of keeping a duplicate (secondary or mirrored) copy of the contents of memory as a redundant backup for use if the primary memory fails. The mirrored copy of the memory is stored in memory of the same processor socket. Dynamic (without reboot) failover to the mirrored DIMMs is transparent to the OS and applications. Note that with Memory Mirroring enabled, only half of the memory capacity of both memory channels is available.  Memory Demand and Patrol Scrubbing: Demand scrubbing is the ability to write corrected data back to the memory once a correctable error is detected on a read transaction. Patrol scrubbing proactively searches the system memory, repairing correctable errors. It prevents accumulation of single-bit errors.  HA and IMC Corrupt Data Containment: Corrupt Data Containment is a process of signaling memory patrol scrub uncorrected data errors synchronous to the transaction, which enhances the containment of the fault and improving the reliability of the system.  Rank Level / Multi Rank Level Memory Sparing: Dynamic fail-over of failing ranks to spare ranks behind the same memory controller. With Multi Rank, up to four ranks out of a maximum of eight ranks can be assigned as spare ranks. Memory mirroring is not supported when memory sparing is enabled.  Failed DIMM Isolation: The ability to identify a specific failing DIMM, thereby enabling the user to replace only the failed DIMM(s). In case of uncorrected error and lockstep mode, only DIMM-pair level isolation granularity is supported. Revision 1.0 39