Intel SAI2 Product Specification - Page 18
Supported Network Features, 4.2.2.1, Video Controller PCI Signals
UPC - 735858149563
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SAI2 Server Board Architecture Overview SAI2 Server Board TPS 2.4.2.1.1 Supported Network Features The 82559 contains an IEEE MII compliant interface to the components necessary to implement an IEEE 802.3 100Base TX network connection. The SAI2 supports the following features of the 82559 controller: • Glueless 32-bit PCI Bus Master Interface (Direct Drive of Bus), compatible with PCI Bus Specification, revision 2.1 / 2.2 • Chained memory structure, with improved dynamic transmit chaining for enhanced performance • Programmable transmit threshold for improved bus utilization • Early receive interrupt for concurrent processing of receive data • On-chip counters for network management • Autodetect and autoswitching for 10 or 100 Mbps network speeds • Support for both 10 Mbps and 100 Mbps networks, full or half duplex-capable, with back-to-back transmit at 100 Mbps • Integrated physical interface to TX magnetics • The magnetics component terminates the 100Base-TX connector interface. A flash device stores the network ID. • Support for Wake-on-LAN (WOL) 2.4.2.2 Video Controller The SAI2 server board includes an ATI Rage XL video controller, 8 MB video SDRAM, and support circuitry for an embedded SVGA video subsystem. The Rage XL, 64-bit VGA Graphics Accelerator contains a SVGA video controller, clock generator, BitBLT engine, and RAMDAC. One 2M x 32 SDRAM chip provides 8 MB of 7ns video memory. The SVGA subsystem supports a variety of modes: up to 1600 X 1200 resolution for CRT displays and up to 1024 X 768 resolution for TFT displays, and up to 16.7 million colors. It also supports analog VGA monitors, single- and multi-frequency, interlaced and non-interlaced, up to 100 Hz vertical refresh frequency. The SAI2 server board provides a standard 15-pin VGA connector. 2.4.2.2.1 Video Controller PCI Signals The Rage XL supports a minimal set of 32-bit PCI signals because it never acts as a PCI master. As a PCI slave, the device requires no arbitration or interrupts. 8 Revision 1.0