Intel SR1640TH Technical Product Specification - Page 6

Table of Contents

Intel® Server System SR1640TH TPS

Revision 1.0

Intel order number: E94847-001

vi

6.1

Control Panel Button

..............................................................................................

77

6.2

Control Panel LED Indicators

................................................................................

77

6.2.1

Power / Sleep LED

................................................................................................

78

6.2.2

System Status LED

................................................................................................

78

6.2.3

System Identification LED

......................................................................................

79

7.

Configuration Jumpers

......................................................................................................

81

7.1

Force IBMC Update (J1A1, J5A1)

.........................................................................

82

7.2

BIOS Recovery Mode (J1G3, J9H3)

......................................................................

82

7.3

Clearing the CMOS (J1G2, J9J1)

..........................................................................

82

Steps for clearing the CMOS

................................................................................................

83

8.

Environmental and Regulatory Specifications

................................................................

84

8.1

System Level Environmental Limits

.......................................................................

84

8.2

Serviceability and Availability

.................................................................................

84

8.3

Replacing the Back up Battery

..............................................................................

84

8.4

Product Regulatory Compliance

............................................................................

85

8.5

Use of Specified Regulated Components

..............................................................

86

8.6

Electromagnetic Compatibility Notices

..................................................................

88

8.6.1

FCC Verification Statement (USA)

........................................................................

88

8.6.2

ICES-003 (Canada)

...............................................................................................

88

8.6.3

Europe (CE Declaration of Conformity)

.................................................................

89

8.6.4

Japan EMC Compatibility

......................................................................................

89

8.6.5

BSMI (Taiwan)

.......................................................................................................

89

8.6.6

KCC (Korea)

..........................................................................................................

89

8.7

Rack Mount Installation Guidelines

.......................................................................

89

8.7.1

If AC power supplies are installed:

........................................................................

90

8.7.2

If DC power supplies are installed:

........................................................................

90

8.8

Power Cord Usage Guidelines

..............................................................................

91

8.9

Product Ecology Compliance

.................................................................................

91

8.10

Other Markings

......................................................................................................

92

Appendix A: Integration and Usage Tips

................................................................................

94

Appendix B: Integrated BMC Sensor Tables

..........................................................................

95

Appendix C: POST Code LED Decoder

..................................................................................

99

Appendix D: POST Code Errors

............................................................................................

102

Glossary

...................................................................................................................................

107

Reference Documents

............................................................................................................

110

Section	Page
1. Introduction	13
1.1 Chapter Outline	13
1.2 Server Board Use Disclaimer	13
2. Functional Architecture	14
2.1 System Views	16
2.2 System Dimensions	17
2.3 System Components	18
2.4 Server Board Overview	19
2.4.1 Server board architecture	19
2.4.2 Processor sub-system	20
2.4.2.1 Intel® Xeon® 3400 Processor	20
2.4.2.2 Intel® Core™ i3 Processor	21
2.4.2.3 Intel® Turbo Boost Technology	21
2.4.2.4 Simultaneous Multithreading (SMT)	21
2.4.2.5 Enhanced Intel SpeedStep® Technology	21
2.4.3 Memory Subsystem	21
2.4.3.1 Memory Sizing and Configuration	22
2.4.3.2 Post Error Codes	22
2.4.3.3 Publishing System Memory	23
2.4.3.3.1 Memory Reservation for Memory-mapped Functions	23
2.4.3.3.2 High-Memory Reclaim	24
2.4.3.3.3 ECC Support	24
2.4.3.4 Memory Map and Population Rules	24
2.4.3.4.1 TableMemory Subsystem Operating Frequency Determination	24
2.4.3.4.2 Memory Subsystem Nomenclature	24
2.4.3.4.3 Memory Upgrade Rules	25
2.4.3.4.4 Memory Configuration Table	25
2.4.3.4.5 UDIMM Configuration rules	26
2.4.3.4.6 RDIMM Configuration rules	26
2.4.4 Intel® 3420 PCH	27
2.4.5 I/O Sub-system	27
2.4.5.1 PCI Express Interface	27
2.4.5.2 Serial ATA Support	28
2.4.5.3 USB 2.0 Support	28
2.4.5.3.1 Native USB Support	28
2.4.5.3.2 Legacy USB Support	28
2.4.6 Integrated Baseboard Management Controller	29
2.4.6.1 Integrated BMC Embedded LAN Channel	30
2.4.6.2 Optional RMM3 Lite-V module	30
2.4.6.3 Serial Ports	31
2.4.6.4 Floppy Disk Controller	31
2.4.6.5 Keyboard and Mouse Support	31
2.4.6.6 Wake-up Control	31
2.4.7 Video Support	31
2.4.8 Network Interface Controller (NIC)	32
2.4.8.1 GigE Controller 82574L	32
2.4.8.2 Dedicated 10/100Mbps management port	32
2.4.8.3 MAC Address Definition	32
2.4.9 Intel® Virtualization Technology for Directed I/O (Intel® VT-d)	32
2.5 Platform Management	33
2.5.1 Feature Support	33
2.5.1.1 IPMI 2.0 Features	33
2.5.1.2 Non-IPMI Features	33
2.5.2 Optional Advanced Management Feature Support	34
2.5.2.1 Enabling Advanced Management Features	34
2.5.2.2 Keyboard, Video, Mouse (KVM) Redirection	34
2.5.2.2.1 Keyboard and Mouse	34
2.5.2.2.2 Video	35
2.5.2.2.3 Availability	35
2.5.2.3 Media Redirection	35
2.5.2.4 Web Services for Management (WS-MAN)	35
2.5.2.5 Local Directory Authentication Protocol (LDAP)	36
2.5.2.6 Embedded Webserver	36
2.5.3 Management Engine (ME)	36
2.5.4 SMBIOS	36
2.5.4.1 Data Storage	36
2.5.5 Event log and Viewer	36
2.5.5.1 Event Log Viewer in Setup	36
2.6 BIOS User Interface	37
2.6.1 Logo / Diagnostic Screen	37
2.6.2 BIOS Boot Popup Menu	37
2.6.3 BIOS Setup utility	38
2.6.4 Operation	38
2.6.4.1 Setup Page Layout	38
2.6.4.2 Entering BIOS Setup	38
2.6.4.3 Keyboard Commands	38
2.6.4.4 Menu Selection Bar	39
2.6.5 Server Platform Setup Utility Screens	40
2.6.5.1 Main Screen	40
2.6.5.2 Advanced Screen	41
2.6.5.2.1 Processor Screen	42
2.6.5.2.2 Memory Screen	45
2.6.5.2.3 Mass Storage Controller Screen	46
2.6.5.2.4 USB Configuration Screen	47
2.6.5.2.5 PCI Screen	48
2.6.5.2.6 System Acoustic and Performance Configuration	49
2.6.5.3 Security Screen	50
2.6.5.4 Server Management Screen	51
2.6.5.5 Server Management System Information Screen	53
2.6.5.6 BMC Configuration	54
2.6.5.7 Boot Options Screen	56
2.6.5.7.1 Add New Boot Option Screen	57
2.6.5.7.2 Delete Boot Option Screen	58
2.6.5.7.3 Hard Disk Order Screen	58
2.6.5.7.4 CDROM Order Screen	59
2.6.5.7.5 Floppy Order Screen	59
2.6.5.7.6 Network Device Order Screen	60
2.6.5.7.7 BEV Device Order Screen	60
2.6.5.8 Boot Manager Screen	61
2.6.5.9 Error Manager Screen	61
2.6.5.10 Exit Screen	62
2.6.6 Loading BIOS Defaults	63
2.7 Connector/Header Locations and Pin-outs	63
2.7.1 General Purpose Connectors	63
2.7.1.1 Power Connectors	65
2.7.1.2 System Management Headers	65
2.7.1.2.1 Intel® Remote Management Module 3 Lite-V (Intel® RMM3 Lite-V) Connector	65
2.7.1.2.2 IPMB Header	65
2.7.1.3 Front Control Panel Connector	66
2.7.1.4 Front Panel USB Connector	66
2.7.1.5 SAS 4i Connector	66
2.7.1.6 Board Identification LED Connector	67
2.7.1.7 System cooling FAN connectors	67
2.7.1.8 Power to backplane connectors	68
2.7.2 Board Jumpers	68
2.7.2.1 CMOS Clear (J1G2, J9J1)	70
2.7.2.2 BIOS Recovery (J1G3, J9H3)	70
2.7.2.3 BMC Force Update (J1A1, J5A1)	70
2.7.3 Board LED	70
Port 80 LED Displays (Diagnositc LED)	70
2.8 System IO feature	71
2.9 Rack and Cabinet Mounting Options	72
3. Power Sub-System	73
3.1 Mechanism overview	73
3.2 Output connectors	73
3.3 Efficiency	74
3.4 AC Input Voltage Specification	74
3.4.1 Input voltage and frequency	74
3.4.2 Input current	75
3.4.3 Input current harmonics	75
3.4.4 AC Line Transient Specification	75
3.4.5 Susceptibility Requirements	75
3.4.5.1 Electrostatic Discharge Susceptibility	76
3.4.5.2 Fast Transient/Burst	76
3.4.5.3 Radiated Immunity	76
3.4.5.4 Surge Immunity	76
3.4.6 AC Line Fast Transient (EFT) Specification	76
3.4.7 AC Line Dropout / Holdup	76
3.4.8 AC Line Leakage Current	77
3.4.9 Power Recovery	77
3.4.9.1 Voltage Brown Out	77
3.4.9.2 Voltage Interruptions	77
3.4.10 AC Line Inrush	77
3.4.11 AC Line Fuse	77
3.4.12 Power Factor Correction	77
3.5 DC output voltage specification	77
3.5.1 Output Rating	77
3.5.2 Remote Sensing (+12VRS)	78
3.5.3 No load operation	78
3.5.4 Regulation, ripple and noise	78
3.5.5 Ripple and noise	78
3.5.6 Transient loading	78
3.5.7 Capacitive load	78
3.5.8 Maximum load change	79
3.5.9 Output voltage rise time	79
3.5.10 Output voltage hold-up time	79
3.5.11 Overshoot	79
3.5.12 Temperature coefficient	79
3.6 Protection Circuits	79
3.6.1 Over-Current/short circuit Protection (OCP)	79
3.6.2 Over-voltage Protection (OVP)	79
3.6.3 Over-temperature Protection (OTP)	80
3.6.4 Thermal Fan Speed Control (External Control)	80
3.7 SMBus communication	80
3.7.1 Power supply management controller (PSMC)	81
3.7.2 Power supply field replacement unit (FRU) signals	81
3.7.3 Power Supply Status LED indicators	81
3.8 PSMC and PMBus compliance	81
3.8.1 Hardware	81
3.8.2 Data Format	82
3.8.3 Function commands supported	82
3.9 FRU data format	82
3.9.1 Product info area	82
3.9.2 Multi-record area	83
3.10 AC Inlet Connector	83
3.11 AC Power Cord Specification Requirements	83
4.1 CPU Heatsink	84
4.2 Three-Fan Module	85
4.3 Power Supply Fan	85
4.4 Air Duct Module	85
5.1 Hard Disk Drive Bays	87
5.2 Hard Drive Carrier	87
6.1 Control Panel Button	89
6.2 Control Panel LED Indicators	89
6.2.1 Power / Sleep LED	90
6.2.2 System Status LED	90
6.2.2.1 System Status LED – BMC Initialization	91
6.2.3 System Identification LED	91
7. Configuration Jumpers	93
7.1 Force IBMC Update (J1A1, J5A1)	94
7.2 BIOS Recovery Mode (J1G3, J9H3)	94
7.3 Clearing the CMOS (J1G2, J9J1)	94
8.1 System Level Environmental Limits	96
8.2 Serviceability and Availability	96
8.3 Replacing the Back up Battery	96
8.4 Product Regulatory Compliance	97
8.5 Use of Specified Regulated Components	98
8.6 Electromagnetic Compatibility Notices	100
8.6.1 FCC Verification Statement (USA)	100
8.6.2 ICES-003 (Canada)	100
8.6.3 Europe (CE Declaration of Conformity)	101
8.6.4 Japan EMC Compatibility	101
8.6.5 BSMI (Taiwan)	101
8.6.6 KCC (Korea)	101
8.7 Rack Mount Installation Guidelines	101
8.7.1 If AC power supplies are installed:	102
8.7.2 If DC power supplies are installed:	102
8.8 Power Cord Usage Guidelines	103
8.9 Product Ecology Compliance	103

Intel SR1640TH Technical Product Specification - Page 6

Appendix C: POST Code LED Decoder

Page 6 highlights