LG B2050 Service Manual - Page 39

Display and Interface - specs

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3. TECHNICAL BRIEF 3.7 Display and Interface LCD Properties Active Screen Size Color Depth Resolution Pixel Size Spec. 28.022(H) X 28.022(V) 65,000 128 X RGB X 128 0.063(H) X 0.209(V) Unit mm colors dots mm 10M VSIM V8 VDDUSB VDDRTC A8 _WR _LBS _UBS _RD _ADV _WAIT BURSTCLK TP112 TP114 TP116 28 _MIDI_CS _LCD_CS C129 CLKON 1000p TP122 C130 NA PWRON _RESET RADIO_STO RADIO_DETECT SPK_RADIO_SEL RADIO_SEL LCD_DIM_CTRL RADIO_SDA ONNOFF RADIO_SCL 2 PWRON 1 _F_WP DSR _MIDI_RESET HOOK_DETECT RADIO_VOL_CLK _LCD_RESET LCD_ID SPK_SEL DEBUG_RX DEBUG_TX RADIO_AMP_SHDN C14S02050 _MIDI_IRQ BATT_EPROM RINGTONE M JACK_DETECT RADIO_VOL_CTRL R117 4.7K R118 10K AMP_EN LCD_BL_EN V1 U1 P5 T4 V2 V4 T5 V6 N9 V7 N10 P13 C9 E9 F9 V3 L18 L14 K16 K18 K14 J16 J18 H16 J14 H18 G16 J13 G18 H14 G14 F16 F18 E18 E16 C18 B18 A18 C16 A17 C15 K5 T7 T8 E11 A12 G13 D18 D15 NWE NLWR NHWR NRD NADV NWAIT BURSTCLK NGPCS1 NAUXCS1 GPIO_42_NMAIN_LCD_CS GPIO_43_NSUB_LCD_CS CLKIN CLKON OSCOUT OSCIN PWRON NRESET GPIO_0_IRDA_TX GPIO_1_IRDA_RX GPIO_2_NIRDA_EN GPIO_3 GPIO_4 GPIO_5 GPIO_6 GPIO_7 GPIO_8 GPIO_9 GPIO_10 GPIO_11 GPIO_12 GPIO_13 GPIO_14 GPIO_15 GPIO_16 GPIO_17 GPIO_33_DEBUG_RX GPIO_34_DEBUG_TX GPIO_35 GPIO_36 GPIO_37 GPIO_38 GPIO_39 GPIO_40 GPIO_45 GPIO_46 GPIO_55 GPIO_56 GPO_22_KEY_BACKLIGHT GPO_23_LCD_BACKLIGHT DATA0 L3 L6 DATA1 DATA2 DATA3 L1 L8 DATA4 M1 L5 DATA5 DATA6 N3 DATA7 N1 P3 DATA8 DATA9 N6 DATA10 P1 R3 DATA11 DATA12 R1 DATA13 N7 P6 DATA14 DATA15 T1 TP100 DATA00 DATA01 DATA02 DATA03 DATA04 DATA05 DATA06 DATA07 DATA08 DATA09 DATA10 DATA11 DATA12 DATA13 DATA14 DATA15 Controlled by _LCD_CS, LCD_RESET, _WR, DATA[00:15], LCD_ID, •_LCD_CS : MAIN LCD driver chip enable. MAIN LCD driver IC has own CS pin •LCD_RESET : This pin resets LCD module. This signal comes from DBB directly. •_WR : Write control Signal •_DATA[00:15] : Parallel data lines. •LCD_ID[1:2] : LCD type selection signals -LCD_ID1 : LCD maker (2.4V is SII, 0V is HyeLCD) -LCD_ID[2:3] : for the future using •Forusing 65K color, data buses should be 16 bits. - 38 -

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3. TECHNICAL BRIEF
- 38 -
Properties
Active Screen Size
28.022(H) X 28.022(V)
65,000
128 X RGB X 128
0.063(H) X 0.209(V)
mm
colors
dots
mm
Color Depth
Resolution
Pixel Size
Spec.
Unit
LCD
VSIM
A8
VDDRTC
VDDUSB
V8
9
A
T
A
D
6
N
0
A
T
A
D
3
L
1
A
T
A
D
6
L
1
P
0
1
A
T
A
D
1
1
A
T
A
D
3
R
2
1
A
T
A
D
1
R
7
N
3
1
A
T
A
D
6
P
4
1
A
T
A
D
1
T
5
1
A
T
A
D
1
L
2
A
T
A
D
8
L
3
A
T
A
D
1
M
4
A
T
A
D
5
L
5
A
T
A
D
3
N
6
A
T
A
D
7
A
T
A
D
1
N
3
P
8
A
T
A
D
0
0
1
P
T
0
1
A
T
A
D
1
0
A
T
A
D
0
0
A
T
A
D
9
0
A
T
A
D
8
0
A
T
A
D
7
0
A
T
A
D
6
0
A
T
A
D
5
0
A
T
A
D
4
0
A
T
A
D
3
0
A
T
A
D
2
0
A
T
A
D
5
1
A
T
A
D
4
1
A
T
A
D
3
1
A
T
A
D
2
1
A
T
A
D
1
1
A
T
A
D
0
3
1
C
A
N
0
5
0
2
0
S
4
1
C
K
7
.
4
7
1
1
R
M
N
I
C
S
O
9
E
9
C
T
U
O
C
S
O
N
O
R
W
P
9
F
4
T
V
D
A
N
1
S
C
X
U
A
N
6
V
1
S
C
P
G
N
5
T
1
U
R
W
H
N
1
V
R
W
L
N
5
P
D
R
N
3
V
T
E
S
E
R
N
2
V
T
I
A
W
N
E
W
N
T
H
G
I
L
K
C
A
B
_
D
C
L
_
3
2
_
O
P
G
8
1
D
5
1
D
8
1
J
6
_
O
I
P
G
7
_
O
I
P
G
6
1
H
4
1
J
8
_
O
I
P
G
8
1
H
9
_
O
I
P
G
3
1
G
T
H
G
I
L
K
C
A
B
_
Y
E
K
_
2
2
_
O
P
G
S
C
_
D
C
L
_
N
I
A
M
N
_
2
4
_
O
I
P
G
9
N
S
C
_
D
C
L
_
B
U
S
N
_
3
4
_
O
I
P
G
7
V
5
4
_
O
I
P
G
7
T
6
4
_
O
I
P
G
8
T
5
_
O
I
P
G
6
1
J
5
5
_
O
I
P
G
1
1
E
2
1
A
6
5
_
O
I
P
G
6
1
K
N
E
_
A
D
R
I
N
_
2
_
O
I
P
G
3
_
O
I
P
G
8
1
K
6
1
E
X
R
_
G
U
B
E
D
_
3
3
_
O
I
P
G
X
T
_
G
U
B
E
D
_
4
3
_
O
I
P
G
8
1
C
8
1
B
5
3
_
O
I
P
G
8
1
A
6
3
_
O
I
P
G
7
3
_
O
I
P
G
6
1
C
8
3
_
O
I
P
G
7
1
A
5
1
C
9
3
_
O
I
P
G
4
1
K
4
_
O
I
P
G
5
K
0
4
_
O
I
P
G
X
T
_
A
D
R
I
_
0
_
O
I
P
G
8
1
L
0
1
_
O
I
P
G
6
1
G
1
1
_
O
I
P
G
3
1
J
8
1
G
2
1
_
O
I
P
G
4
1
H
3
1
_
O
I
P
G
4
1
_
O
I
P
G
4
1
G
5
1
_
O
I
P
G
6
1
F
8
1
F
6
1
_
O
I
P
G
8
1
E
7
1
_
O
I
P
G
X
R
_
A
D
R
I
_
1
_
O
I
P
G
4
1
L
K
L
C
T
S
R
U
B
4
V
N
I
K
L
C
0
1
N
N
O
K
L
C
3
1
P
K
0
1
8
1
1
R
1
2
8
2
p
0
0
0
1
9
2
1
C
4
1
1
P
T
2
2
1
P
T
6
1
1
P
T
2
1
1
P
T
10M
O
T
S
_
O
I
D
A
R
K
L
C
_
L
O
V
_
O
I
D
A
R
L
R
T
C
_
L
O
V
_
O
I
D
A
R
M
O
R
P
E
_
T
T
A
B
N
D
H
S
_
P
M
A
_
O
I
D
A
R
T
C
E
T
E
D
_
O
I
D
A
R
L
C
S
_
O
I
D
A
R
T
C
E
T
E
D
_
K
O
O
H
L
E
S
_
K
P
S
L
E
S
_
O
I
D
A
R
N
E
_
P
M
A
L
R
T
C
_
M
I
D
_
D
C
L
L
E
S
_
O
I
D
A
R
_
K
P
S
F
F
O
N
N
O
T
I
A
W
_
N
O
R
W
P
N
O
R
W
P
N
O
K
L
C
K
L
C
T
S
R
U
B
R
S
D
P
W
_
F
_
A
D
S
_
O
I
D
A
R
T
C
E
T
E
D
_
K
C
A
J
S
C
_
D
C
L
_
E
N
O
T
G
N
I
R
Q
R
I
_
I
D
I
M
_
X
T
_
G
U
B
E
D
X
R
_
G
U
B
E
D
D
I
_
D
C
L
T
E
S
E
R
_
D
C
L
_
T
E
S
E
R
_
I
D
I
M
_
V
D
A
_
N
E
_
L
B
_
D
C
L
R
W
_
T
E
S
E
R
_
D
R
_
S
B
L
_
S
B
U
_
S
C
_
I
D
I
M
_
Controlled by _LCD_CS, LCD_RESET, _WR, DATA[00:15], LCD_ID,
•_LCD_CS : MAIN LCD driver chip enable. MAIN LCD driver IC has own CS pin
•LCD_RESET : This pin resets LCD module. This signal comes from DBB directly.
•_WR : Write control Signal
•_DATA[00:15] : Parallel data lines.
•LCD_ID[1:2] : LCD type selection signals
-LCD_ID1 : LCD maker (2.4V is SII, 0V is HyeLCD)
-LCD_ID[2:3] : for the future using
•Forusing 65K color, data buses should be 16 bits.
3.7 Display and Interface