MSI E7505 User Guide - Page 57

BIOS Setup module. Selecting By SPD makes the following settings automatically determined by BIOS according to the configurations on the SPD. Setting options: By SPD, Manual. CAS Latency Time This setting controls the timing delay (in clock cycles) before SDRAM starts a read command after receiving it. Setting options: 1.5, 2, 2.5 (clocks). 1.5 (clocks) increases the system performance the most while 2.5 (clocks) provides the most stable performance. Active to Precharge Delay This setting controls the number of clock cycles for DRAM to be allowed to precharge from the active state. Setting options: 7, 6, 5. DRAM RAS# to CAS# Delay When DRAM is refreshed, both rows and columns are addressed separately. This setup item allows you to determine the timing of the transition from RAS (row address strobe) to CAS (column address strobe). The less the clock cycles, the faster the DRAM performance. Setting options: 3, 2. DRAM RAS# Precharge This item controls the number of cycles for Row Address Strobe (RAS) to be allowed to precharge. If insufficient time is allowed for the RAS to accumulate its charge before DRAM refresh, refresh may be incomplete and DRAM may fail to retain data. This item applies only when synchronous DRAM is installed in the system. Setting options: 2, 3. DRAM Data Integrity Mode Select ECC (Error-Checking & Correcting Code) or Non-ECC according to the type of DRAM installed. System BIOS Cacheable Selecting Enabled allows caching of the system BIOS ROM at F0000hFFFFFh, resulting in better system performance. However, if any program writes to this memory area, a system error may result. Setting options: Enabled, Disabled. Video BIOS Cacheable Selecting Enabled allows caching of the video BIOS ROM at C0000h to 3-13