MSI Z77MA User Guide - Page 49

Adjusted DRAM Frequency

Page 49 highlights

Chapter 2 MS-7759 ▶ EIST Enhanced Intel SpeedStep technology allows you to set the performance level of the microprocessor whether the computer is running on battery or AC power. This field only appears with installed CPUs that support this technology. ▶ Intel Turbo Boost Enables or disables Intel Turbo Boost which automatically boosts CPU performance above rated specifications (when applications requests the highest performance state of the processor). ▶ OC Genie Button Operation This item is used to enable/disable the OC Genie button operation. ▶ DRAM Frequency This item allows you to adjust the DRAM frequency. Please note the overclocking behavior is not guaranteed. ▶ Adjusted DRAM Frequency It shows the adjusted DRAM frequency. Read-only. ▶ DRAM Timing Mode Select whether DRAM timing is controlled by the SPD (Serial Presence Detect) EEPROM on the DRAM module. Setting to [Auto] enables DRAM timings and the following "Advanced DRAM Configuration" sub-menu to be determined by BIOS based on the configurations on the SPD. Selecting [Link] or [Unlink] allows users to configure the DRAM timings for each channel and the following related "Advanced DRAM Configuration" sub-menu manually. ▶ Advanced DRAM Configuration Press to enter the sub-menu. ▶ Command Rate This setting controls the DRAM command rate. ▶ tCL Controls CAS latency which determines the timing delay (in clock cycles) of starting a read command after receiving data. ▶ tRCD Determines the timing of the transition from RAS (row address strobe) to CAS (column address strobe). The less clock cycles, the faster the DRAM performance. ▶ tRP Controls number of cycles for RAS (row address strobe) to be allowed to pre-charge. If insufficient time is allowed for RAS to accumulate before DRAM refresh, the DRAM may fail to retain data. This item applies only when synchronous DRAM is installed in the system. ▶ tRAS Determines the time RAS (row address strobe) takes to read from and write to memory cell. ▶ tRFC This setting determines the time RFC takes to read from and write to a memory cell. 2-11

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2-11
MS-7759
Chapter 2
EIST
Enhanced Intel SpeedStep technology allows you to set the performance level of the
m±croprocessor whether the computer ±s runn±ng on battery or AC power. Th±s field only
appears w±th ±nstalled CPUs that support th±s technology.
Intel Turbo Boost
Enables or d±sables Intel Turbo Boost wh±ch automat±cally boosts CPU performance
above rated spec±ficat±ons (when appl±cat±ons requests the h±ghest performance state
of the processor).
OC Gen±e Button Operat±on
Th±s ±tem ±s used to enable/d±sable the OC Gen±e button operat±on.
DRAM Frequency
Th±s ±tem allows you to adjust the DRAM frequency. Please note the overclock±ng be-
hav±or ±s not guaranteed.
Adjusted DRAM Frequency
It shows the adjusted DRAM frequency. Read-only.
DRAM T±m±ng Mode
Select whether DRAM t±m±ng ±s controlled by the SPD (Ser±al Presence Detect) EE-
PROM on the DRAM module. Sett±ng to [Auto] enables DRAM t±m±ngs and the follow±ng
“Advanced DRAM Configurat±on” sub-menu to be determ±ned by BIOS based on the
configurat±ons on the SPD. Select±ng [L±nk] or [Unl±nk] allows users to configure the
DRAM t±m±ngs for each channel and the follow±ng related “Advanced DRAM Configura-
t±on” sub-menu manually.
Advanced DRAM Configurat±on
Press <Enter> to enter the sub-menu.
Command Rate
Th±s sett±ng controls the DRAM command rate.
tCL
Controls CAS latency wh±ch determ±nes the t±m±ng delay (±n clock cycles) of start±ng
a read command after rece±v±ng data.
tRCD
Determ±nes the t±m±ng of the trans±t±on from RAS (row address strobe) to CAS (col-
umn address strobe). The less clock cycles, the faster the DRAM performance.
tRP
Controls number of cycles for RAS (row address strobe) to be allowed to pre-charge.
If ±nsuffic±ent t±me ±s allowed for RAS to accumulate before DRAM refresh, the DRAM
may fa±l to reta±n data. Th±s ±tem appl±es only when synchronous DRAM ±s ±nstalled
±n the system.
tRAS
Determ±nes the t±me RAS (row address strobe) takes to read from and wr±te to mem-
ory cell.
tRFC
Th±s sett±ng determ±nes the t±me RFC takes to read from and wr±te to a memory
cell.