Sharp XL-HP515 Service Manual - Page 48

LVref, CONTROL, CIRCUIT, LBASS, LSEL0, INTERFACE, IC601 VHiLC75341/-1: Audio Processor LC75341

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XL-HP515 IC601 VHiLC75341/-1: Audio Processor (LC75341) Pin No. 1 2 3 4 5 6 7 8 9-12 Terminal Name DI CE VSS LOUT LBASS LTRE LIN LSEL0 L4-1 Function Serial data and clock input pin for control. Chip enable pin. Data written into an internal latch in a timing of "H" to "L". Each analog switch is activated. Data transfer enabled at "H" level. Ground pin. Bass band filter comprising capacitor and resistor connection pin and bass/treble output pin. Bass band filter comprising capacitor and resistor connection pin. Treble band filter comprising capacitor and resistor connection pin. Volume + equaliser output pin. Input selector output pin. Input signal pin. IC601 VHiLC75341/-1: Audio Processor (LC75341) Pin No. 13-16 17 18 19 20 21 22 23 24 Terminal Name R1-4 RSEL0 RIN RTRE RBASS ROUT VREF VDD CLK Function Input signal pin. Input selector output pin. Volume + equaliser output pin Treble band filter comprising capacitor and resistor connection pin. Bass band filter comprising capacitor and resistor connection pin. Bass band filter comprising capacitor and resistor connection pin and bass/ treble output pin. 0.5x VDD voltage generation block for analog ground. Capacitor of several 10µF to be connected between VREF and AWSS (VSS) as a countermeasure against power ripple. Supply pin Serial data and clock input pin for control. LSEL0 LIN LTRE LBASS LOUT 87 6 54 L4 9 CD L3 10 Tuner L2 11 Tape L1 12 Video R1 13 R2 14 R3 15 R4 16 CONTROL CIRCUIT CONTROL CIRCUIT CONTROL CIRCUIT LVref CCB INTERFACE RVref 3 VSS 2 CE 1 DI 24 CLK 23 VDD 22 VREF RSEL0 RIN RTRE RBASS ROUT 17 18 19 20 21 Figure 3 BLOCK DIAGRAM OF IC 8 - 6

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XL-HP515
8 – 6
IC601 VHiLC75341/-1: Audio Processor (LC75341)
IC601 VHiLC75341/-1: Audio Processor (LC75341)
Pin No.
Terminal Name
Function
1
DI
Serial data and clock input pin for con-
trol.
2
CE
Chip enable pin.
Data written into an internal latch in a
timing of "H" to "L".
Each analog switch is activated.
Data transfer enabled at "H" level.
3
VSS
Ground pin.
4
LOUT
Bass band filter comprising
capacitor and resistor connection pin
and bass/treble output pin.
5
LBASS
Bass band filter comprising capacitor
and resistor connection pin.
6
LTRE
Treble band filter comprising capacitor
and resistor connection pin.
7
LIN
Volume + equaliser output pin.
8
LSEL0
Input selector output pin.
9-12
L4-1
Input signal pin.
Pin No.
Terminal Name
Function
13-16
R1-4
Input signal pin.
17
RSEL0
Input selector output pin.
18
RIN
Volume + equaliser output pin
19
RTRE
Treble band filter comprising capacitor
and resistor connection pin.
20
RBASS
Bass band filter comprising capacitor
and resistor connection pin.
21
ROUT
Bass band filter comprising capacitor
and resistor connection pin and bass/
treble output pin.
22
VREF
0.5x VDD voltage generation
block
for analog ground. Capacitor of sev-
eral 10μF to be connected between
VREF and AWSS (VSS) as a counter-
measure against power ripple.
23
VDD
Supply pin
24
CLK
Serial data and clock input pin for con-
trol.
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
18
17
LVref
RVref
CONTROL
CIRCUIT
CONTROL
CIRCUIT
CONTROL
CIRCUIT
LOUT
LBASS
LIN
LSEL0
L4
L3
L2
L1
R1
R2
R3
R4
RSEL0
RIN
RTRE
LTRE
RBASS
ROUT
VREF
VDD
CLK
DI
CE
VSS
CCB
INTERFACE
CD
Tuner
Tape
Video
Figure 3 BLOCK DIAGRAM OF IC