Sony HCD-HPR90 Service Manual - Page 46

Sony HCD-HPR90 - Receiver Component For Mini Hi-fi Systems Manual

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HCD-HPR90/HPR99XM Pin No. 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 Pin Name SVDD JTAGTCK JTAGTDI JTAGTDO JTAGTMS TRST VSS VDD IOVDD2 DOUT TEST TES1 IOVSS2 PLLVDD PLLVSS XVSS XTAO XTAI XVDD AVDD1 AOUT1 VREFL AVSS1 AVSS2 VREFR AOUT2 AVDD2 IOVDD0 IOVSS0 I/O Description - Power supply terminal (+2.5V) I Clock signal input terminal (for JTAG) Not used I Data input terminal (for JTAG) Not used O Data output terminal (for JTAG) Not used I Mode select signal input terminal (for JTAG) Not used I Reset signal input terminal (for JTAG) Not used - Ground terminal - Power supply terminal (+1.8V) - Power supply terminal (+3.3V) O Digital audio signal output terminal Not used I Input terminal for the test Normally: fixed at "L" I Input terminal for the test Normally: fixed at "L" - Ground terminal - Power supply terminal (+1.8V) - Ground terminal - Ground terminal O System clock output terminal (16.9344 MHz) I System clock input terminal (16.9344 MHz) - Power supply terminal (+1.8V) - Power supply terminal (+3.3V) O L-ch analog audio signal output terminal O L-ch reference voltage output terminal - Ground terminal - Ground terminal O R-ch reference voltage output terminal O R-ch analog audio signal output terminal - Power supply terminal (+3.3V) - Power supply terminal (+3.3V) - Ground terminal 46

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46
HCD-HPR90/HPR99XM
Pin No.
Pin Name
I/O
Description
92
SVDD
-
Power supply terminal (+2.5V)
93
JTAGTCK
I
Clock signal input terminal (for JTAG)
Not used
94
JTAGTDI
I
Data input terminal (for JTAG)
Not used
95
JTAGTDO
O
Data output terminal (for JTAG)
Not used
96
JTAGTMS
I
Mode select signal input terminal (for JTAG)
Not used
97
TRST
I
Reset signal input terminal (for JTAG)
Not used
98
VSS
-
Ground terminal
99
VDD
-
Power supply terminal (+1.8V)
100
IOVDD2
-
Power supply terminal (+3.3V)
101
DOUT
O
Digital audio signal output terminal
Not used
102
TEST
I
Input terminal for the test
Normally: fixed at "L"
103
TES1
I
Input terminal for the test
Normally: fixed at "L"
104
IOVSS2
-
Ground terminal
105
PLLVDD
-
Power supply terminal (+1.8V)
106
PLLVSS
-
Ground terminal
107
XVSS
-
Ground terminal
108
XTAO
O
System clock output terminal (16.9344 MHz)
109
XTAI
I
System clock input terminal (16.9344 MHz)
110
XVDD
-
Power supply terminal (+1.8V)
111
AVDD1
-
Power supply terminal (+3.3V)
112
AOUT1
O
L-ch analog audio signal output terminal
113
VREFL
O
L-ch reference voltage output terminal
114
AVSS1
-
Ground terminal
115
AVSS2
-
Ground terminal
116
VREFR
O
R-ch reference voltage output terminal
117
AOUT2
O
R-ch analog audio signal output terminal
118
AVDD2
-
Power supply terminal (+3.3V)
119
IOVDD0
-
Power supply terminal (+3.3V)
120
IOVSS0
-
Ground terminal