Via EPIA-M10000G User Manual - Page 60
Bank Interleave, Precharge to Active Trp, Active to Precharge Tras, Active to CMD Trcd, DRAM Command
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Chapter 3 Bank Interleave Set the interleave mode of the SDRAM interface. Interleaving allows banks of SDRAM to alternate their refresh and access cycles. One bank will undergo its refresh cycle while another is being accessed. This improves performance of the SDRAM by masking the refresh time of each bank. This field is only available when "DRAM Timing" is set to "Manual". Settings: Disabled, 2 Bank, 4 Bank Precharge to Active (Trp) This field controls the length of time it takes to precharge a row in the memory module before the row becomes active. Longer values are safer but may not offer the best performance. This field is only available when "DRAM Timing" is set to "Manual". Settings: 2T, 3T Active to Precharge (Tras) This field controls the length of time it a row stays active before precharging. Longer values are safer but may not offer the best performance. This field is only available when "DRAM Timing" is set to "Manual". Settings: 5T, 6T Active to CMD (Trcd) This field is only available when "DRAM Timing" is set to "Manual". Settings: 2T, 3T DRAM Command Rate This field controls how fast the memory controller sends out commands. Lower setting equals faster command rate. Please note that some memory modules may not be able to handle lower settings. Settings: 2T Command, 1T Command DRAM Burst Len This field sets the length of time for one burst of data during a read/write transaction. Longer settings equal better memory performance. Settings: 4, 8 DRAM Voltage This field sets the voltage for the memory module. Settings: 2.9V, 2.8V, 2.6V, 2.5V 52