ViewSonic VX800-3 Service Manual - Page 38

Image Processor

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1.3. Image Processor IC400 (gm5120) is an all-in-one image processor for displays with a dual (analog and digital) interface supporting resolutions up to SXGA. It provides integrated ADC/PLL and a DVI compliant TMDS receiver and MCU, a high quality zoom and shrink scaling engine, an on-screen display (OSD) controller, a microprocessor and many other functions in a single device. This high level of integration enables simple, flexible, cost-effective solutions featuring fewer required components. The gm5120 chip has three ADC's (analog-to-digital converters), one for each color (red, green, and blue) and supports digital separate sync (HSYNC/VSYNC), digital composite sync, and analog composite sync (also known as sync-on-green, or SOG). All sync types are supported without the need for external sync separation / extraction circuits. The gm5120 features four clock inputs. All additional clocks are internal clocks derived from one or more of these four, using Direct Digital Synthesis (DDS). TCLK is generated using an external crystal (recommended) or an external clock oscillator. (1) Input Clock (TCLK). The external connection to the oscillator is via the TCLK and XTAL pads. A 14.3MHz crystal source is recommended, as internal PLL and logic circuits derive the required clock frequencies from this single source by default. Other crystal frequencies may be used, but require custom bootstrapping and programming. In lieu of using a crystal oscillator, XTAL can be driven by a single-ended TTL/CMOS input clock (e.g. for testing of the IC) - the TCLK pin should be grounded through a 2.7k pull down resistor to maintain the correct duty cycle for the clock. ViewSonic Corporation 44! Confidential - Do Not Copy VX800-3

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1.3. Image Processor
IC400 (gm5120) is an all-in-one image processor for displays with a dual (analog and digital)
interface supporting resolutions up to SXGA. It provides integrated ADC/PLL and a DVI
compliant TMDS receiver and MCU, a high quality zoom and shrink scaling engine, an
on-screen display (OSD) controller, a microprocessor and many other functions in a single
device. This high level of integration enables simple, flexible, cost-effective solutions featuring
fewer required components.
The gm5120 chip has three ADC’s (analog-to-digital converters), one for each color
(red, green, and blue) and supports digital separate sync (HSYNC/VSYNC), digital
composite sync, and analog composite sync (also known as sync-on-green, or SOG). All
sync types are supported without the need for external sync separation / extraction circuits.
The gm5120 features four clock inputs. All additional clocks are internal clocks derived
from one or more of these four, using Direct Digital Synthesis (DDS).
TCLK is generated using an external crystal (recommended) or an external clock
oscillator. (1) Input Clock (TCLK). The external connection to the oscillator is via the TCLK
and XTAL pads. A 14.3MHz crystal source is recommended, as internal PLL and logic
circuits derive the required clock frequencies from this single source by default. Other
crystal frequencies may be used, but require custom bootstrapping and programming. In
lieu of using a crystal oscillator, XTAL can be driven by a single-ended TTL/CMOS input
clock (e.g. for testing of the IC) – the TCLK pin should be grounded through a 2.7k pull
down resistor to maintain the correct duty cycle for the clock.
ViewSonic Corporation
Confidential – Do Not Copy
VX
8
00-3