AMD ADA3000DAA4BW User Guide - Page 83

IDD Max. Refer to the AMD Functional Data Sheet, 754 Pin Package, order# 31410, for complete VDD

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PID: 30430 Rev 3.51 March 2006 AMD Athlon™ 64 Processor Power and Thermal Data Sheet Notes: 1. The VID_VDD voltage for Low Power M obile parts corresponds to 0 load (0 Amp IDD) conditions for the VID[4:0] requested VDD supply level. Refer to the AM D Functional Data Sheet, 754 Pin Package, order #31410, for details. 2. The VDD_dc Typical Voltage is calculated using the following formula: VDD_dc Typ = VID_VDD - 1.83 mV/A * IDD M ax. Refer to the AM D Functional Data Sheet, 754 Pin Package, order# 31410, for complete VDD sp ecificat ions. 3. Thermal Design Power (TDP) for Low Power M obile parts is measured under the conditions of Tdie M ax, IDD M ax, and VDD=VDD_dc Typ, and include all power dissipated on-die from VDD, VDDIO, VLDT, VTT, and VDDA. Contact your Field Application Engineer for more information on TDP specifications. 4. Assumes Tdie max, max P-state VDD_dc Typ +25 mV, clock divider set to 512. 5. Assumes 50°C, min P-state VID_VDD, clock divider set to 512. 6. Assumes 35°C, min P-state VID_VDD, clock divider set to 512, HyperTransport™ links disconnected, memory in self-refresh mode, DDR SDRAM interface tri-stated except clocks and CKE pins. 7. Assumes 35°C, AltVID, clock divider set to 512, HyperTransport™ links disconnected, memory in self-refresh mode, DDR SDRAM interface tri-stated except CKE pins. Not all systems are AltVID capable. Refer to the BIOS and Kernel Developer's Guide for AM D Athlon™ 64 and AM D Opteron™ Processors, order# 26094 for further details. 8. BIOS programs the AltVID setting into Function 3: Offset D8h. Not all systems are AltVID capable. Refer to the BIOS and Kernel Developer's Guide for AM D Athlon™ 64 and AM D Opteron™ Processors, order# 26094 for further details. 9. Assumes 35°C, VDD, VDDA, and VLDT supplies are off, VDDIO and VTT are powered, memory in self-refresh mode and DDR SDRAM interface tri-stated except CKE pins. 10. Thermal Design Power dissipated by the processor VDDIO, VTT, VLDT, and VDDA power planes only. 11. Thermal Design Power dissipated by the processor VDDIO and VTT power planes only. 12. Implementation of this P-state is optional in BIOS. 13. Assumes VDDIO = 2.5 V and VTT = VDDIO / 2. Refer to the AM D Functional Data Sheet, 754 Pin Package, order# 31410 for complete VDDIO and VTT power supply specifications. AMD Turion™ 64 Mobile Technology 83

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PID: 30430 Rev 3.51 March 2006
AMD Athlon™ 64 Processor Power and Thermal Data Sheet
83
AMD Turion™ 64 Mobile Technology
1.
The VID_VDD voltage for Low Power Mobile parts corresponds to 0 load (0 Amp IDD) conditions for the
VID[4:0] requested VDD supply level. Refer to the AMD Functional Data Sheet, 754 Pin Package, order #31410,
for details.
2.
The VDD_dc Typical Voltage is calculated using the following formula: VDD_dc Typ = VID_VDD – 1.83 mV/A
* IDD Max. Refer to the AMD Functional Data Sheet, 754 Pin Package, order# 31410, for complete VDD
specifications.
3.
Thermal Design Power (TDP) for Low Power Mobile parts
is measured under the conditions of Tdie Max, IDD
Max, and VDD=VDD_dc Typ, and include all power dissipated on-die from VDD, VDDIO, VLDT, VTT, and
VDDA.
Contact your Field Application Engineer for more information on TDP specifications.
4.
Assumes Tdie max, max P-state VDD_dc Typ +25 mV, clock divider set to 512.
5.
Assumes 50°C, min P-state VID_VDD, clock divider set to 512.
6.
Assumes 35°C, min P-state
VID_VDD, clock divider set to 512, HyperTransport™ links disconnected, memory
in self-refresh mode, DDR SDRAM interface tri-stated except clocks and CKE pins.
7.
Assumes 35°C, AltVID, clock divider set to 512, HyperTransport™ links disconnected, memory in self-refresh
mode, DDR SDRAM interface tri-stated except CKE pins. Not all systems are AltVID capable. Refer to the
BIOS and Kernel Developer’s Guide for AMD Athlon™ 64 and AMD Opteron™ Processors, order# 26094 for
further details.
8.
BIOS programs the AltVID setting into Function 3: Offset D8h. Not all systems are AltVID capable. Refer to the
BIOS and Kernel Developer’s Guide for AMD Athlon™ 64 and AMD Opteron™ Processors, order# 26094 for
further details.
9.
Assumes 35°C, VDD, VDDA, and VLDT supplies are off, VDDIO and VTT are powered, memory in self-refresh
mode and DDR SDRAM interface tri-stated except CKE pins.
10.
Thermal Design Power dissipated by the processor VDDIO, VTT, VLDT, and VDDA power planes only.
11.
Thermal Design Power dissipated by the processor VDDIO and VTT power planes only.
12.
Implementation of this P-state is optional in BIOS.
13.
Assumes VDDIO = 2.5 V and VTT = VDDIO / 2. Refer to the AMD Functional Data Sheet, 754 Pin Package,
order# 31410 for complete VDDIO and VTT power supply specifications.
Notes: