ASRock AD410PV User Manual - Page 30
Dram Timing Control, Dram Tcl, Dram Trcd, Dram Trp, Dram Tras, Dram Trfc, Dram Twr, Dram Twtr, Dram
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DRAM Timing Control BIOS SETUP UTILITY OC Tweaker DRAM Timing Control Standard Memory Info : 6-6-6-18-52-6-3-3-3 DRAM tCL [Auto] DRAM tRCD [Auto] DRAM tRP [Auto] DRAM tRAS [Auto] DRAM tRFC [Auto] DRAM tWR [Auto] DRAM tWTR [Auto] DRAM tRRD [Auto] DRAM tRTP [Auto] Specifies the CAS Latency Time. Min = 3 Max = 7 +F1 F9 F10 ESC Select Screen Select Item Change Option General Help Load Defaults Save and Exit Exit v02.54 (C) Copyright 1985-2003, American Megatrends, Inc. DRAM tCL This controls the number of DRAM clocks for TCL. Min: 3. Max: 7. The default value is [Auto]. DRAM tRCD This controls the number of DRAM clocks for TRCD. Min: 3. Max: 10. The default value is [Auto]. DRAM tRP This controls the number of DRAM clocks for TRP. Min: 3. Max: 10. The default value is [Auto]. DRAM tRAS This controls the number of DRAM clocks for TRAS. Min: 9. Max: 24. The default value is [Auto]. DRAM tRFC This controls the number of DRAM clocks for TRFC. Min: 15. Max: 78. The default value is [Auto]. DRAM tWR This controls the number of DRAM clocks for TWR. Min: 3. Max: 15. The default value is [Auto]. DRAM tWTR This controls the number of DRAM clocks for TWTR. Min: 2. Max: 15. The default value is [Auto]. DRAM tRRD This controls the number of DRAM clocks for TRRD. Min: 2. Max: 15. The default value is [Auto]. DRAM tRTP This controls the number of DRAM clocks for TRTP. Min: 2. Max: 13. The default value is [Auto]. 30