Asus M2N-VM DVI User Manual - Page 73

ECC Configuration

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ECC Configuration ECC Configuration ECC Mode DRAM ECC Enable DRAM SCRUB REDIRECT 4-Bit ECC Mode DRAM BG Scrub Data Cache BG Scrub L2 Cache BG Scrub L3 Cache BG Scrub [Disabled] [Disabled] [Disabled] [Disabled] [Disabled] [Disabled] [Disabled] [Disabled] DRAM ECC allows hardware to report and correct memory errors automatically maintaining system integrity. ECC Enable [Disabled] Enables or disables the DRAM ECC that allows the hardware to report and correct memory errors automatically. Configuration options: [Disabled] [Basic] [Good] [Super] [Max] [User] DRAM ECC Enable [Disabled] Enables or disables the DRAM ECC. Configuration options: [Disabled] [Enabled] DRAM SCRUB REDIRECT [Disabled] Enables or disables the DRAM SCRUB REDIRECT feature that allows the system to correct the DRAM ECC errors immediately when they occur. Configuration options: [Disabled] [Enabled] 4-Bit ECC Mode [Disabled] Enables or disables the ECC chip kill feature. Configuration options: [Disabled] [Enabled] DRAM BG SCRUB [Disabled] Disables or sets the DRAM BG Scrub. Configuration options: [Disabled] [40ns] [80ns] [160ns] [320ns] [640ns] [1.28us] [2.56us] [5.12us] [10.2us] [20.5us] [41.0us] [81.9us] [163.8us] [327.7us] [655.4us] Data/L2/L3 Cache BG Scrub [Disabled] Disables or sets the Data/L2/L3 Cache BG Scrub. This item allows the cache RAM to be corrected when idle. Configuration options: [Disabled] [40ns] [80ns] [160na] [320ns] [640ns] [1.28us] [2.56us] [5.12us] [10.2us] [20.5us] [41.0us] [81.9us] [163.8us] [327.7us] [655.4us] ASUS M2N-CM DVI 2-25

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ASUS M2N-CM DVI
2-25
ECC Enable [Disabled]
Enables or disables the DRAM ECC that allows the hardware to report and
correct memory errors automatically. Configuration options: [Disabled] [Basic]
[Good] [Super] [Max] [User]
DRAM ECC Enable [Disabled]
Enables or disables the DRAM ECC. Configuration options: [Disabled] [Enabled]
DRAM SCRUB REDIRECT [Disabled]
Enables or disables the DRAM SCRUB REDIRECT feature that allows the system to
correct the DRAM ECC errors immediately when they occur. Configuration options:
[Disabled] [Enabled]
4-Bit ECC Mode [Disabled]
Enables or disables the ECC chip kill feature. Configuration options: [Disabled]
[Enabled]
DRAM BG SCRUB [Disabled]
Disables or sets the DRAM BG Scrub. Configuration options: [Disabled] [40ns]
[80ns] [160ns] [320ns] [640ns] [1.28us] [2.56us] [5.12us] [10.2us] [20.5us] [41.0us]
[81.9us] [163.8us] [327.7us] [655.4us]
Data/L2/L3 Cache BG Scrub [Disabled]
Disables or sets the Data/L2/L3 Cache BG Scrub. This item allows the cache RAM
to be corrected when idle. Configuration options: [Disabled] [40ns] [80ns] [160na]
[320ns] [640ns] [1.28us] [2.56us] [5.12us] [10.2us] [20.5us] [41.0us] [81.9us]
[163.8us] [327.7us] [655.4us]
ECC Configuration
ECC Mode
[Disabled]
DRAM ECC Enable
[Disabled]
DRAM SCRUB REDIRECT
[Disabled]
4-Bit ECC Mode
[Disabled]
DRAM BG Scrub
[Disabled]
Data Cache BG Scrub
[Disabled]
L2 Cache BG Scrub
[Disabled]
L3 Cache BG Scrub
[Disabled]
ECC Configuration
DRAM ECC allows
hardware to report
and correct memory
errors automatically
maintaining system
integrity.