Asus M5A78L-M LE USB3 User Guide - Page 41

Chipset - overclock

Page 41 highlights

Value (Core 0) / (Core 1) / (Core 2) / (Core 3) [-2%] These items only appear when you set Advanced Clock Calibration to [Per Core] and allow you to set the overclocking percentage for each process core separately. Configuration options: [0%] [+2%] [+4%] [+6%] [+8%] [+10%] [+12%] [-2%] [-4%] [-6%] [-8%] [-10%] [-12%] 2.4.3 Chipset NorthBridge Configuration DRAM Controller Configuration Bank Interleaving [Auto] Allows you to enable the bank memory interleaving. Configuration options: [Disabled] [Auto] Node Interleaving [Disabled] Allows you to enable the node memory interleaving. Configuration options: [Disabled] [Auto] Channel Interleaving [Auto] Allows you to enable the channel memory interleaving. Configuration options: [Disabled] [Auto] Memory Hole Remapping [Enabled] Allows you to enable or disable memory remapping around memory hole. Configuration options: [Disabled] [Enabled] DCT Unganged Mode [Always] Allows you to select unganged DRAM mode (64-bit width). Configuration options: [Always] [Auto] Power Down Enable [Disabled] Allows you to enable or disable DDR power down mode. Configuration options: [Disabled] [Enabled] ECC Configuration ECC Mode [Disabled] Enables or disables the DRAM ECC that allows the hardware to report and correct memory errors automatically. Configuration options: [Disabled] [Basic] [Good] [Super] [Max] [User] DRAM ECC Enable [Enabled] This item appears only when you set ECC Mode to [User] and allows hardware to report and correct memory errors automatically maintaining system integrity. Internal Graphics Primary Video Controller [GFX0-GPP-IGFX-PCI] Selects the primary display adapter. Configuration options: [GFX0-GPP-IGFX-PCI] [GPPGFX0-IGFX-PCI] [PCI-GFX0-GPP-IGFX] [IGFX-GFX0-GPP-PCI] GFX0:primary video controller on a PCIe x16 slot GPP: primary video controller on a PCIe x1 slot IGFX: onboard display output port PCI: primary video controller on a PCI slot ASUS M5A78L-M LE/USB3 2-13

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ASUS M5A78L-M LE/USB3
2-13
Value (Core 0) / (Core 1) / (Core 2) / (Core 3) [-2%]
These items only appear when you set
Advanced Clock Calibration
to
[Per Core]
and allow you to set the overclocking percentage for each process core separately.
Configuration options: [0%] [+2%] [+4%] [+6%] [+8%] [+10%] [+12%] [‑2%] [‑4%]
[‑6%] [‑8%] [‑10%] [‑12%]
2.4.3
Chipset
NorthBridge Configuration
DRAM Controller Configuration
Bank Interleaving [Auto]
Allows you to enable the bank memory interleaving. Configuration options: [Disabled]
[Auto]
Node Interleaving [Disabled]
Allows you to enable the node memory interleaving. Configuration options: [Disabled]
[Auto]
Channel Interleaving [Auto]
Allows you to enable the channel memory interleaving. Configuration options:
[Disabled] [Auto]
Memory Hole Remapping [Enabled]
Allows you to enable or disable memory remapping around memory hole. Configuration
options: [Disabled] [Enabled]
DCT Unganged Mode [Always]
Allows you to select unganged DRAM mode (64‑bit width). Configuration options:
[Always] [Auto]
Power Down Enable [Disabled]
Allows you to enable or disable DDR power down mode. Configuration options:
[Disabled] [Enabled]
ECC Configuration
ECC Mode [Disabled]
Enables or disables the DRAM ECC that allows the hardware to report and correct
memory errors automatically. Configuration options: [Disabled] [Basic] [Good] [Super]
[Max] [User]
DRAM ECC Enable [Enabled]
This item appears only when you set
ECC Mode
to [User] and allows hardware to
report and correct memory errors automatically maintaining system integrity.
Internal Graphics
Primary Video Controller [GFX0-GPP-IGFX-PCI]
Selects the primary display adapter. Configuration options: [GFX0‑GPP‑IGFX‑PCI] [GPP‑
GFX0‑IGFX‑PCI] [PCI‑GFX0‑GPP‑IGFX] [IGFX‑GFX0‑GPP‑PCI]
GFX0: primary video controller on a PCIe x16 slot
GPP: primary video controller on a PCIe x1 slot
IGFX: onboard display output port
PCI:
primary video controller on a PCI slot