EVGA 121-BL-E756-TR User Manual - Page 65

Award POST Codes

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Award POST Codes Code Name 0A Mouse Init Description Initialized the mouse 0B Reserved 0C Reserved 0D Reserved 0E CheckSum Check Check the integrity of the ROM,BIOS and message 0F Reserved 10 Autodetect EEPROM Check Flash type and copy flash write/erase routines 11 Reserved 12 Test CMOS Test and Reset CMOS 13 Reserved 14 Load Chipset Load Chipset Defaults 15 Reserved 16 Init Clock Initialize onboard clock generator 17 Reserved 18 Init CPU CPU ID and initialize L1/L2 cache 19 Reserved 1A Reserved 1B Setup Interrupt Initialize first 120 interrupt vectors with Vector Table SPURIOUS_INT_HDLR and initialize INT 00h-1Fh according to INT_TBL 1C CMOS Battery Test CMOS and check Battery Fail Check 1D Early PM Early PM initialization 1E Reserved 1F Re-initial KB Load keyboard matrix 20 Reserved 21 HPM init Init Heuristic Power Management (HPM) 22 Reserved 23 Program chipset Early Programming of chipset registers 66

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66
Award POST Codes
Code
Name
Description
0A
Mouse Init
Initialized the mouse
0B
Reserved
0C
Reserved
0D
Reserved
0E
CheckSum
Check
Check the integrity of the ROM,BIOS and message
0F
Reserved
10
Autodetect
EEPROM
Check Flash type and copy flash write/erase routines
11
Reserved
12
Test CMOS
Test and Reset CMOS
13
Reserved
14
Load Chipset
Load Chipset Defaults
15
Reserved
16
Init Clock
Initialize onboard clock generator
17
Reserved
18
Init CPU
CPU ID and initialize L1/L2 cache
19
Reserved
1A
Reserved
1B
Setup Interrupt
Vector Table
Initialize first 120 interrupt vectors with
SPURIOUS_INT_HDLR and initialize INT 00h-1Fh
according to INT_TBL
1C
CMOS Battery
Check
Test CMOS and check Battery Fail
1D
Early PM
Early PM initialization
1E
Reserved
1F
Re-initial KB
Load keyboard matrix
20
Reserved
21
HPM init
Init Heuristic Power Management (HPM)
22
Reserved
23
Program
chipset
Early Programming of chipset registers