EVGA 122-M2-NF59-TR User Manual - Page 34

SPP <> MCP Ref Clock

Page 34 highlights

System Clocks Use this section to control chipset features, specifically clocks, voltages, and memory timings. Frequency Settings Ref Clock (HTT) Reference clock frequency CPU Multiplier The value of the CPU multiplier PCIe Bus, Slot 1 The frequency of the PCI-Express Bus, Slot 1 PCIe Bus, Slot 2 The frequency of the PCI-Express Bus, Slot 2 SPP MCP Ref Clock The frequency of the reference clock between SPP and MCP chips HT Multiplier CPU nForce SPP The HT multiplier between the CPU and the SPP nForce SPP > nForce MCP The HT multiplier from the SPP to the MCP HT Width CPU < > nForce SPP The HT width between the CPU and the SPP nForce SPP nForce MCP The HT width between the SPP and the MCP EVGA Corporation 2900 Saturn St. Suite B, Brea, CA 92821 Phone: 888 / 881-EVGA - 714 / 528-4500 - Fax: 714 / 528-4501 Page 33

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EVGA Corporation 2900 Saturn St. Suite B, Brea, CA 92821
Phone: 888 / 881-EVGA - 714 / 528-4500 - Fax: 714 / 528-4501
Page 33
System Clocks
Use this section to control chipset features, specifically clocks, voltages, and
memory timings.
Frequency Settings
Ref Clock (HTT)
Reference clock frequency
CPU Multiplier
The value of the CPU multiplier
PCIe Bus, Slot 1
The frequency of the PCI-Express Bus, Slot 1
PCIe Bus, Slot 2
The frequency of the PCI-Express Bus, Slot 2
SPP <> MCP Ref Clock
The frequency of the reference clock between SPP and MCP chips
HT Multiplier
CPU <> nForce SPP
The HT multiplier between the CPU and the SPP
nForce SPP > nForce MCP
The HT multiplier from the SPP to the MCP
HT Width
CPU < > nForce SPP
The HT width between the CPU and the SPP
nForce SPP <> nForce MCP
The HT width between the SPP and the MCP