EVGA 122-M2-NF59-TR User Manual - Page 36

Memory Configuration Optimized for nForce Mem Enable memory settings that are Optimized for nForce (only functional with DRAM that is Optimzed for nForce). Memory Timings Use this menu to control memory timings (see Memory Timings section below) Drive Strength setting Use this menu to control drive strength settings (see Drive Strength settings section below) Dram on-die termination Resistance of the on-die termination resistors Read/Write queue bypass Number of times to bypass the read/write queue Bypass Maximum Max number of times that the oldest memory access request can be bypassed 32 Byte Granularity 32/64 byte DRAM access granularity NVMEM memory test Run NVIDIA memory testing module during POST DQS Training Control Perform/Skip DQS training CKE base power down mode Enable/Disable CKE base power down mode CKE power down control CKE power down mode selection. It should be set to "per channel" for non mobile systems. Memclock tri-stating Memclock tri-stating during C3 and Alt VID Memory Hole remapping Enable/Disable memory hole remapping Auto Optimize Bottom IO Auto optimize maximum DRAM size when kernel assigns PCI resources done. Memory Timings EVGA Corporation 2900 Saturn St. Suite B, Brea, CA 92821 Phone: 888 / 881-EVGA - 714 / 528-4500 - Fax: 714 / 528-4501 Page 35