Gateway E-9722R Gateway E-9722R Server User Guide - Page 74

Bootblock initialization code checkpoints

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68 CHAPTER 6: Troubleshooting Check point A2 A4 A7 A8 A9 AA AB AC B1 00 Description Take care of runtime image preparation for different BIOS modules. Fill the free area in F000h segment with 0FFh. Initializes the Microsoft® IRQ Routing Table. Prepares the runtime language module. Disables the system configuration display, if needed. Initialize runtime language module. Display the system configuration screen, if enabled. Initialize the CPUs before boot, including the programming of the MTRRs. Prepare CPU for operating system boot, including final MTRR values. Wait for user input at config display, if needed. Uninstall POST INT1Ch vector and INT09h vector. De-initializes the ADM module. Prepare BBS in Int 19 boot. End of POST initialization of chipset registers. Save system context for ACPI. Pass control to OS Loader (typically INT19h). Bootblock initialization code checkpoints The Bootblock initialization code sets up the chipset, memory, and other components before system memory is available. The following table provides the diagnostic LED code for these checkpoints and describes the type of checkpoints that may occur during the bootblock initialization: Check Description point Before Early chipset initialization is done. Early super I/O initialization is done, including RTC D1h and keyboard controller. NMI is disabled. D1 Perform keyboard controller BAT test. Check if waking up from power management suspend state. Save power-on CPUID value in scratch CMOS. D0 Go to flat mode with 4 GB limit and GA20 enabled. Verify the bootblock checksum. D2 Disable CACHE before memory detection. Execute full memory sizing module. Verify that flat mode is enabled. D3 If memory sizing module not executed, start memory refresh and do memory sizing in Bootblock code. Do additional chipset initialization. Re-enable CACHE. Verify that flat mode is enabled. D4 Test base 512 KB memory. Adjust policies and cache first 8 MB. Set stack. D5 Bootblock code is copied from ROM to lower system memory and control is given to it. BIOS now executes out of RAM. D6 Both key sequence and OEM-specific method is checked to determine if BIOS recovery is forced. Main BIOS checksum is tested. If BIOS recovery is necessary, control flows to checkpoint E0. See Bootblock Recovery Code Checkpoints section of document for more information. D7 Restore CPUID value back into register. The Bootblock-Runtime interface module is moved to system memory and control is given to it. Determine whether to execute serial flash. D8 The Runtime module is uncompressed into memory. CPUID information is stored in memory.

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CHAPTER 6: Troubleshooting
68
Bootblock initialization code checkpoints
The Bootblock initialization code sets up the chipset, memory, and other components before
system memory is available. The following table provides the diagnostic LED code for these
checkpoints and describes the type of checkpoints that may occur during the bootblock
initialization:
A2
Take care of runtime image preparation for different BIOS modules. Fill the free area
in F000h segment with 0FFh. Initializes the Microsoft
®
IRQ Routing Table. Prepares
the runtime language module. Disables the system configuration display, if needed.
A4
Initialize runtime language module.
A7
Display the system configuration screen, if enabled. Initialize the CPUs before boot,
including the programming of the MTRRs.
A8
Prepare CPU for operating system boot, including final MTRR values.
A9
Wait for user input at config display, if needed.
AA
Uninstall POST INT1Ch vector and INT09h vector. De-initializes the ADM module.
AB
Prepare BBS in Int 19 boot.
AC
End of POST initialization of chipset registers.
B1
Save system context for ACPI.
00
Pass control to OS Loader (typically INT19h).
Check
point
Description
Before
D1h
Early chipset initialization is done. Early super I/O initialization is done, including RTC
and keyboard controller. NMI is disabled.
D1
Perform keyboard controller BAT test. Check if waking up from power management
suspend state. Save power-on CPUID value in scratch CMOS.
D0
Go to flat mode with 4 GB limit and GA20 enabled. Verify the bootblock checksum.
D2
Disable CACHE before memory detection. Execute full memory sizing module. Verify
that flat mode is enabled.
D3
If memory sizing module not executed, start memory refresh and do memory sizing
in Bootblock code. Do additional chipset initialization. Re-enable CACHE. Verify that
flat mode is enabled.
D4
Test base 512 KB memory. Adjust policies and cache first 8 MB. Set stack.
D5
Bootblock code is copied from ROM to lower system memory and control is given
to it. BIOS now executes out of RAM.
D6
Both key sequence and OEM-specific method is checked to determine if BIOS
recovery is forced. Main BIOS checksum is tested. If BIOS recovery is necessary,
control flows to checkpoint E0. See Bootblock Recovery Code Checkpoints section of
document for more information.
D7
Restore CPUID value back into register. The Bootblock-Runtime interface module is
moved to system memory and control is given to it. Determine whether to execute
serial flash.
D8
The Runtime module is uncompressed into memory. CPUID information is stored in
memory.
Check
point
Description