Gigabyte GA-970A-DS3 Manual - Page 23
CPU FrequencyMHz, PCIE ClockMHz, HT Link Width, HT Link Frequency, DRAM E.O.C.P, Set Memory Clock, - overclocking
View all Gigabyte GA-970A-DS3 manuals
Add to My Manuals
Save this manual to your list of manuals |
Page 23 highlights
&& CPU Frequency(MHz) Allows you to manually set the CPU host frequency. The adjustable range is from 200 MHz to 500 MHz. This option is configurable only when CPU Host Clock Control is set to Manual. Important It is highly recommended that the CPU frequency be set in accordance with the CPU specifications. && PCIE Clock(MHz) Allows you to manually set the PCIe clock frequency. The adjustable range is from 100 MHz to 150 MHz. Auto sets the PCIe clock frequency to standard 100 MHz. (Default: Auto) && HT Link Width Allows you to manually set the width for the HT Link between the CPU and chipset. Auto BIOS will automatically adjust the HT Link Width. (Default) 8 bit Sets HT Link Width to 8 bit. 16 bit Sets HT Link Width to 16 bit. && HT Link Frequency Allows you to manually set the frequency for the HT Link between the CPU and chipset. Auto BIOS will automatically adjust the HT Link Frequency. (Default) x1~x13 Sets HT Link Frequency to x1~x13 (200 MHz~2.6 GHz). && DRAM E.O.C.P Allows you to determine whether to use the preset memory overclocking profile to achieve optimum overclocking performance. (Default: Disabled) && Set Memory Clock Determines whether to manually set the memory clock. Auto lets BIOS automatically set the memory clock as required. Manual allows the memory clock control item below to be configurable. (Default: Auto) && Memory Clock This option is configurable only when Set Memory Clock is set to Manual. The adjustable range is dependent on the CPU being installed. && DRAM Configuration CMOS Setup Utility-Copyright (C) 1984-2011 Award Software DRAM Configuration CPU Host Clock Control x CPU Frequency(MHz) Set Memory Clock x Memory Clock DCTs Mode DDR3 Timing Items x 1T/2T Command Timing x CAS# latency x RAS to CAS R/W Delay x Row Precharge Time x Minimum RAS Active Time x TwTr Command Delay x Trfc0 for DIMM1, DIMM3 x Trfc1 for DIMM2, DIMM4 x Write Recovery Time x Precharge Time x Row Cycle Time x RAS to RAS Delay **DCTs Drive Strength** [Auto] 200 [Auto] x6.66 1333Mhz [Unganged] [Auto] SPD Auto Auto -- -- Auto 9T 9T Auto 9T 9T Auto 9T 9T Auto 24T 24T Auto 5T 5T Auto 110ns 110ns Auto -- -- Auto 10T 10T Auto 5T 5T Auto 33T 33T Auto 4T 4T DCT0 DCT1 Item Help Menu Level Move Enter: Select F5: Previous Values +/-/PU/PD: Value F10: Save F6: Fail-Safe Defaults ESC: Exit F1: General Help F7: Optimized Defaults - 23 -