HP X Class 500/550MHz HP Visualize X-Class 500MHz, 550MHz Technical Reference - Page 106

DMA Channel Controllers, Table 4-5. Summary Of How The DMA Channels Are Allocated

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HP BIOS BIOS Addresses Table 4-4. HP I/O Port Map Default Values for I/O Address Ports 0778 - 077B 0CF8 - 0CFF 8000 8400 8800 - Function LPT1 ECP PCI configuration space PIIX4E Power Management I/O Space NS317 ACPI Registers PIIX4E SMBus I/O Space DMA Channel Controllers Only "I/O-to-memory" and "memory-to-I/O" transfers are allowed. "I/O-to-I/O" and "memory-to-memory" transfers are disallowed by the hardware configuration. The system controller supports seven DMA channels, each with a page register used to extend the addressing range of the channel to 16 MB. The following table summarizes how the DMA channels are allocated. Table 4-5. Summary Of How The DMA Channels Are Allocated Channel DMA 0 DMA 1 DMA 2 DMA 3 DMA 4 DMA 5 DMA 6 DMA 7 DMA controller Function AD1816 Capture AD1816 Playback NS317 Flexible disk controller NS317 LPT ECP Used to cascade DMA channels 0-3 Free Free Free 106 Chapter 4

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106
Chapter 4
HP BIOS
BIOS Addresses
DMA Channel Controllers
Only
“I/O-to-memory”
and
“memory-to-I/O”
transfers
are
allowed.
“I/O-to-I/O”
and
“memory-to-memory” transfers are disallowed by the hardware configuration. The system
controller supports seven DMA channels, each with a page register used to extend the
addressing range of the channel to 16 MB. The following table summarizes how the DMA
channels are allocated.
0778 - 077B
LPT1 ECP
0CF8 - 0CFF
PCI configuration space
8000 -
PIIX4E Power Management I/O Space
8400 -
NS317 ACPI Registers
8800 -
PIIX4E SMBus I/O Space
Table 4-5. Summary Of How The DMA Channels Are Allocated
DMA controller
Channel
Function
DMA 0
AD1816 Capture
DMA 1
AD1816 Playback
DMA 2
NS317 Flexible disk controller
DMA 3
NS317 LPT ECP
DMA 4
Used to cascade DMA channels 0-3
DMA 5
Free
DMA 6
Free
DMA 7
Free
Table 4-4. HP I/O Port Map
Default Values for
I/O Address Ports
Function