HP X Class 500/550MHz HP Visualize X-Class 500MHz, 550MHz Technical Reference - Page 126

The following are for boot block in Flash ROM, Checkpoint Code, POST Routine Description

Page 126 highlights

Tests and Error Messages Order in Which the Tests Are Performed Checkpoint Code A4h A8h AAh ACh AEh B0h B2h B5H B6h B8h B9h BAh BBh BCh BDh BEh BFh C0h C1h C2h C3h C4h E0h E1h POST Routine Description Initialize typematic rate Erase F2 prompt Scan for F2 key stroke Enter SETUP Clear IN POST flag Check for errors POST done - prepare to boot operating system Terminate QuietBoot Check password (optional) Clear global descriptor table Clean up all graphics Initialize DMI parameters Initialize PnP Option ROMs Clear parity checkers Display MultiBoot menu Clear screen optional Check virus and backup reminders Try to boot with INT 19 Initialize POST Error Manager (PEM) Initialize error logging Initialize error display function Initialize system error handling The following are for boot block in Flash ROM Initialize the chipset Initialize the bridge 126 Chapter 5

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126
Chapter 5
Tests and Error Messages
Order in Which the Tests Are Performed
A4h
Initialize typematic rate
A8h
Erase F2 prompt
AAh
Scan for F2 key stroke
ACh
Enter SETUP
AEh
Clear IN POST flag
B0h
Check for errors
B2h
POST done - prepare to boot operating system
B5H
Terminate QuietBoot
B6h
Check password (optional)
B8h
Clear global descriptor table
B9h
Clean up all graphics
BAh
Initialize DMI parameters
BBh
Initialize PnP Option ROMs
BCh
Clear parity checkers
BDh
Display MultiBoot menu
BEh
Clear screen optional
BFh
Check virus and backup reminders
C0h
Try to boot with INT 19
C1h
Initialize POST Error Manager (PEM)
C2h
Initialize error logging
C3h
Initialize error display function
C4h
Initialize system error handling
The following are for boot block in Flash ROM
E0h
Initialize the chipset
E1h
Initialize the bridge
Checkpoint Code
POST Routine Description