Hitachi Global Storage Technologies
List of Tables
Table 1: Formatted capacities
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15
Table 2: Data sheet
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15
Table 3: Cylinder allocation
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Table 4: Performance characteristics
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Table 5: Mechanical positioning performance
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Table 6: Full stroke seek time
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Table 7: Single track seek time
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Table 8: Average latency
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Table 9: Drive ready time
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Table 10: Description of operating modes
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Table 11: Drive ready time
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Table 12: Examples of error cases.
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Table 13: Environmental condition
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Table 14: Magnetic flux density limits
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Table 15: DC power requirements
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Table 16: Power consumption efficiency
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Table 18: Random vibration PSD profile breakpoints (operating)
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Table 19: Swept sine vibration
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Table 20: Random Vibration PSD Profile Breakpoints (nonoperating)
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34
Table 21: Operating shock
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Table 22: Nonoperating shock
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Table 23: Weighted sound power
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Table 24: Signal definitions
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Table 25: Special signal definitions for Ultra DMA
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Table 26: PIO cycle timings
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Table 27: Multiword DMA cycle timings
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Table 28: Ultra DMA cycle timings (Initiating Read)
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Table 29: Ultra DMA cycle timings (Host Pausing Read)
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48
Table 30: Ultra DMA cycle timings (Host Terminating Read)
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49
Table 31: Ultra DMA cycle timings (Device Terminating Read)
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50
Table 32: Ultra DMA cycle timing (Initiating Write)
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Table 33: Ultra DMA cycle timing (Device Pausing Write)
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52
Table 34: Ultra DMA cycle timings (Device TerminatingWrite)
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Table 35: Ultra DMA cycle timings (Host Terminating Write)
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54
Table 36: I/O address map
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Table 37: Register Set
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63
Table 38: Alternate Status Register
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Table 39: Device Control Register
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Table 40: Drive Address Register
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Table 41:
Device Head/Register
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Table 42: Error Register
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Table 43: Status Register
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