Intel D525MW Product Specification - Page 41
Intel D525MW Manual
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Technical Reference 2.2.2.1 Signal Tables for the Connectors and Headers Table 11. Serial Port Header Pin 1 3 5 7 9 Signal Name DCD (Data Carrier Detect) TXD# (Transmit Data) Ground RTS (Request To Send) RI (Ring Indicator) Pin 2 4 6 8 10 Signal Name RXD# (Receive Data) DTR (Data Terminal Ready) DSR (Data Set Ready) CTS (Clear To Send) Key (no pin) Table 12. LVDS Data Connector - 30-Pin (D525MWV only) Pin 1 Signal Name LA_CLKN Description LVDS Channel A diff clock output negative LVDS Channel A diff clock output positive Power for EDID ROM LVDS Channel A diff data output - negative LVDS Channel A diff data output - positive LVDS Channel A diff data output - negative LVDS Channel A diff data output - positive Ground LVDS Channel A diff data output - negative LVDS Channel A diff data output - positive Ground Ground Selectable LCD power output Selectable LCD power output EDID/DDC clock signal Pin 2 Signal Name NC Description 3 LA_CLKP 4 NC 5 7 EDID_3.3V LA_DATAN0 6 8 EDID_GND NC Ground for EDID signaling 9 LA_DATAP0 10 NC 11 LA_DATAN1 12 NC 13 LA_DATAP1 14 NC 15 17 GND LA_DATAN2 16 18 GND NC Ground 19 LA_DATAP2 20 NC 21 23 25 27 29 GND GND 3.3 V/5 V/12 V 3.3 V/5 V/12 V EDID_CLK 22 24 26 28 30 GND GND 3.3 V/5 V/12 V 3.3 V/5 V/12 V EDID_DATA Ground Ground Selectable LCD power output Selectable LCD power output EDID/DDC data signal 41