Intel S3420GPLC Product Specification - Page 30

Memory Subsystem - setup

Page 30 highlights

Functional Architecture Intel® Server Board S3420GP TPS  Turbo Boost converts any available power and thermal headroom into higher frequency on active cores. At nominal marked processor frequency, many applications consume less than the rated processor power draw.  Turbo Boost availability is independent of the number of active cores.  Maximum Turbo Boost frequency depends on the number of active cores and varies by processor configuration.  The amount of time the system spends in Turbo Boost operation depends on workload, operating environment, and platform design. If the processor supports the Intel® Turbo Boost Technology feature, the BIOS Setup provides an option to enable or disable this feature. The default state is enabled. 3.1.4 Simultaneous Multithreading (SMT) Most Intel® Xeon® processors support Simultaneous Multithreading (SMT). The BIOS detects processors that support this feature and enables the feature during POST. If the processor supports this feature, the BIOS Setup provides an option to enable or disable this feature. The default is enabled. 3.1.5 Enhanced Intel SpeedStep® Technology Most processors support the Enhanced Intel SpeedStep® technology. This technology changes the processor operating ratio and voltage similar to the Thermal Monitor 1 (TM1) feature. The BIOS implements this technology in conjunction with the TM1 feature. The BIOS enables a combination of TM1 and TM2 according to the processor BIOS writer's guide. 3.2 Memory Subsystem The Intel® Xeon® Processor 3400 Series has an Integrated Memory Controller (IMC) in its package. Each Intel® Xeon® Processor 3400 Series produces up to two DDR3 channels of memory. Each DDR3 channel in the IMC supports up to three DDR3 RDIMM slots or up to two UDIMM slots. The DDR3 RDIMM frequency can be 800/1066/1333 MHz. DDR3 UDIMM frequency can be 1066/1333 MHz. All RDIMMs and UDIMMs include ECC (Error Correction Code) operation. Various speeds and memory technologies are supported. Note: Intel® Xeon® Processor L3406 only supports DDR3 Unbuffered DIMM (UDIMM). The Intel® CoreTM Processor i3-500 Series and Intel® Pentium® Processor G6950 have an Integrated Memory Controller (IMC) supports DDR3 protocols with two independent, 64-bit wide channels each accessing one or two DIMMs. Only DDR3 UDIMM can be supported with the Intel® Core® i3-500 Desktop Processor Series and Intel® Pentium® Processor G6950. RAS (Reliability, Availability, and Serviceability) is not supported on the Intel® Server Board S3420GP. 3.2.1 Memory Sizing and Configuration The Intel® Server Board S3420GP supports various memory module sizes and configurations. These combinations of sizes and configurations are valid only for DDR3 DIMMs approved by Intel Corporation. 18 Revision 2.4 Intel order number E65697-010

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Functional Architecture
Intel® Server Board S3420GP TPS
Revision 2.4
Intel order number E65697-010
18
Turbo Boost converts any available power and thermal headroom into higher frequency
on active cores. At nominal marked processor frequency, many applications consume
less than the rated processor power draw.
Turbo Boost availability is independent of the number of active cores.
Maximum Turbo Boost frequency depends on the number of active cores and varies by
processor configuration.
The amount of time the system spends in Turbo Boost operation depends on workload,
operating environment, and platform design.
If the processor supports the Intel
®
Turbo Boost Technology feature, the BIOS Setup provides
an option to enable or disable this feature. The default state is enabled.
3.1.4
Simultaneous Multithreading (SMT)
Most Intel
®
Xeon
®
processors support Simultaneous Multithreading (SMT). The BIOS detects
processors that support this feature and enables the feature during POST.
If the processor supports this feature, the BIOS Setup provides an option to enable or disable
this feature. The default is enabled.
3.1.5
Enhanced Intel SpeedStep
®
Technology
Most processors support the Enhanced Intel SpeedStep
®
technology. This technology changes
the processor operating ratio and voltage similar to the Thermal Monitor 1 (TM1) feature. The
BIOS implements this technology in conjunction with the TM1 feature.
The BIOS enables a
combination of TM1 and TM2 according to the processor BIOS writer's guide.
3.2
Memory Subsystem
The Intel
®
Xeon
®
Processor 3400 Series has an Integrated Memory Controller (IMC) in its
package. Each Intel
®
Xeon
®
Processor 3400 Series produces up to two DDR3 channels of
memory. Each DDR3 channel in the IMC supports up to three DDR3 RDIMM slots or up to two
UDIMM slots. The DDR3 RDIMM frequency can be 800/1066/1333 MHz. DDR3 UDIMM
frequency can be 1066/1333 MHz. All RDIMMs and UDIMMs include ECC (Error Correction
Code) operation. Various speeds and memory technologies are supported.
Note:
Intel
®
Xeon
®
Processor L3406 only supports DDR3 Unbuffered DIMM (UDIMM).
The Intel
®
Core
TM
Processor i3-500 Series and Intel
®
Pentium
®
Processor G6950 have an
Integrated Memory Controller (IMC) supports DDR3 protocols with two independent, 64-bit wide
channels each accessing one or two DIMMs. Only DDR3 UDIMM can be supported with the
Intel
®
Core
®
i3-500 Desktop Processor Series and Intel
®
Pentium
®
Processor G6950.
RAS (Reliability, Availability, and Serviceability) is not supported on the Intel
®
Server Board
S3420GP.
3.2.1
Memory Sizing and Configuration
The Intel
®
Server Board S3420GP supports various memory module sizes and configurations.
These combinations of sizes and configurations are valid only for DDR3 DIMMs approved by
Intel Corporation.