Intel S3420GPLC Product Specification - Page 69

Mass Storage Controller Screen, Advanced, Mass Storage

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Intel® Server Board S3420GP TPS BIOS User Interface Setup Item Effective Memory Current Configuration Comments Information only. The amount of memory available to the operating system in MB or GB. The Effective Memory is the difference between the Total Physical Memory and the sum of all memory reserved for internal usage, RAS redundancy and SMRAM. This difference includes the sum of all DDR3 DIMMs that failed Memory BIST during POST, or were disabled by the BIOS during memory discovery phase to optimize memory configuration. Information only. Displays one of the following: Independent Mode: System memory is configured for optimal performance and efficiency and no RAS is enabled. Sparing Mode: System memory is configured for RAS with optimal effective memory. Current Memory Speed DIMM_ XY Information only. Displays the speed the memory is running at. Displays the state of each DIMM socket present on the board. Each DIMM socket field reflects one of the following possible states: Installed: There is a DDR3 DIMM installed in this slot. Not Installed: There is no DDR3 DIMM installed in this slot. Disabled: The DDR3 DIMM installed in this slot was disabled by the BIOS to optimize memory configuration. Failed: The DDR3 DIMM installed in this slot is faulty/malfunctioning. Spare Unit: The DDR3 DIMM is functioning as a spare unit for memory RAS purposes. Note: X denotes the Channel Identifier and Y denote the DIMM Identifier within the Channel. 6.3.2.2.3 Mass Storage Controller Screen The Mass Storage screen allows the user to configure the SATA/SAS controller when it is present on the baseboard, midplane, or backplane of an Intel system. To access this screen from the Main menu, select Advanced > Mass Storage. Revision 2.4 57 Intel order number E65697-010

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Intel® Server Board S3420GP TPS
BIOS User Interface
Revision 2.4
Intel order number E65697-010
57
Setup Item
Comments
Effective Memory
Information only.
The amount of memory available to the
operating system in MB or GB.
The Effective Memory is the difference between the Total Physical
Memory and the sum of all memory reserved for internal usage,
RAS redundancy and SMRAM. This difference includes the sum of
all DDR3 DIMMs that failed Memory BIST during POST, or were
disabled by the BIOS during memory discovery phase to optimize
memory configuration.
Current Configuration
Information only.
Displays one of the following:
Independent Mode
: System memory is configured for optimal
performance and efficiency and no RAS is enabled.
Sparing Mode:
System memory is configured for RAS with
optimal effective memory.
Current Memory
Speed
Information only.
Displays the speed the memory is running at.
DIMM_ XY
Displays the state of each DIMM socket present on the board.
Each DIMM socket field reflects one of the following possible
states:
Installed
: There is a DDR3 DIMM installed in this slot.
Not Installed
: There is no DDR3 DIMM installed in this slot.
Disabled
: The DDR3 DIMM installed in this slot was disabled by
the BIOS to optimize memory configuration.
Failed
: The DDR3 DIMM installed in this slot is
faulty/malfunctioning.
Spare Unit
: The DDR3 DIMM is functioning as a spare unit for
memory RAS purposes.
Note
: X denotes the Channel Identifier and Y denote the DIMM
Identifier within the Channel.
6.3.2.2.3
Mass Storage Controller Screen
The Mass Storage screen allows the user to configure the SATA/SAS controller when it is
present on the baseboard, midplane, or backplane of an Intel system.
To access this screen from the Main menu, select
Advanced
>
Mass Storage
.