Sharp LC-26SH12U Service Manual - Page 34

Sdram Schematic Diagram

Page 34 highlights

A B C D E F G SDRAM SCHEMATIC DIAGRAM 8 (DIGITAL PCB) 7 6 5 4 3 FROM/TO POWER3 +3.3V VDDC_1.0V 2 GND +2.5V_IO MEM[1.8V] C2456 10 C ATSC/CLEAR CABLE ASIC IC IC2401 X242 (5/14 SDRAM) MEM_DQA0 MEM_DQA1 MEM_DQA2 MEM_DQA3 MEM_DQA4 MEM_DQA5 MEM_DQA6 MEM_DQA7 MEM_DQA8 MEM_DQA9 MEM_DQA10 MEM_DQA11 MEM_DQA12 MEM_DQA13 MEM_DQA14 MEM_DQA15 MEM_DQM0# MEM_DQM1# MEM_QS0 MEM_QS0# MEM_QS1 MEM_QS1# B2405 FCM1608KF-151T06 C2458 C2457 C2459 0.1 B 0.1 B 0.1 B C2461 0.1 B C2460 0.1 B 0 R24 0 P24 0 P25 0 P26 0 N24 0 M24 0 M25 0 M26 0 L25 0 L26 0 K24 0 K25 0 K26 0 J26 0 H24 0 H25 DQA0 DQA1 DQA2 DQA3 DQA4 DQA5 DQA6 DQA7 DQA8 DQA9 DQA10 DQA11 DQA12 DQA13 DQA14 DQA15 0 L24 0 H26 DQMA#0 DQMA#1 0 N25 0 N26 0 J24 0 J25 QSA0 QSA0# QSA1 QSA1# 3.3 E24 PESD_1 3.3 AB23 PESD_2 1.0 AC24 MPVDD 0 AD25 MPVSS MAA0 U26 0 MAA1 V24 0 MAA2 W26 0 MAA3 T25 0 MAA4 T24 0 MAA5 Y26 0 MAA6 W24 0 MAA7 Y25 0 MAA8 T26 0 MAA9 V26 0 MAA10 V25 0 MAA11 Y24 0 MAA12 U24 0 MAA13 U25 0 MAA14 W25 0 MAA15 AA26 0 MEM_AA0 MEM_AA1 MEM_AA2 MEM_AA3 MEM_AA4 MEM_AA5 MEM_AA6 MEM_AA7 MEM_AA8 MEM_AA9 MEM_AA10 MEM_AA11 MEM_AA12 MEM_AA13 MEM_AA14 MEM_AA15 JG2411 RASA# CASA# WEA# CSA# ODTA CKEA CLKA CLKA# AC26 0 AA24 0 AA25 0 AB25 0 AB24 0 AB26 0 R26 0 R25 0 MVREFD G25 1.8 MVREFS G26 MEMTEST AC25 1.8 0 R2412 TEST_YCLK AD26 0 15 +-1% C2462 0.1 B C2479 R2415 R2416 15 +-1% R2417 R2418 R2419 MRAS# MCAS# MRWE# MCS# MEM_ODT MCKEN MCLK MCLK# 0.1 B 15 +-1% 10K 1K +-1% 1K +-1% R2413 R2414 1K +-1% 1K +-1% 1.8 R23 0 T23 2.5 D24 2.5 L23 2.5 AC23 0 J23 0 M23 VDDRH0 VDDR1_0 D20 1.8 VSSRH0 VDDR1_1 D21 1.8 VDDR1_2 D22 1.8 VDDR1_3 F23 1.8 VDDR1_4 G23 1.8 VDDR1_5 G24 1.8 VDDR1_6 H23 1.8 VDDR1_7 K23 1.8 VDDR1_8 U23 1.8 VDDR1_9 V23 1.8 MEM_IO2.5_1 VDDR1_10 W23 1.8 MEM_IO2.5_2 VDDR1_11 Y23 1.8 MEM_IO2.5_3 VDDR1_12 AC19 1.8 VDDR1_13 AC20 1.8 VSSR_MEM_ST_A1 VDDR1_14 AC21 1.8 VSSR_MEM_ST_A0 VDDR1_15 AC22 1.8 C2463 C2464 C2465 C2466 C2467 C2468 C2469 C2470 C2471 C2472 C2473 C2474 C2475 C2476 C2477 C2478 0.1 B 1B 0.1 B 1B 0.1 B 1B 0.1 B 1B 0.1 B 1B 0.1 B 1B 0.1 B 1B 0.1 B 10 C 512Mbit DDR2 SDRAM IC IC2402 HYB18T512161BF-25 MEM_AA15 MEM_AA14 MEM_AA12 MEM_AA11 MEM_AA10 MEM_AA5 MEM_AA7 MEM_AA2 MEM_AA6 MEM_AA8 MEM_AA4 MEM_AA3 MEM_AA9 MEM_AA1 MEM_AA0 MCLK# MCLK MCKEN 0 L2 BA0 0 L3 BA1 0 R2 0 P7 0 M2 0 P3 0 P8 0 P2 0 N7 0 N3 0 N8 0 N2 0 M7 0 M3 0 M8 A12 A11 A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 0 K8 CK 0 J8 CK 0 K2 CKE MCS# MRWE# MRAS# MCAS# 0 L8 CS 0 K3 WE 0 K7 RAS 0 L7 CAS MEM_DQM0# MEM_DQM1# MEM_ODT MEM_QS0 MEM_QS0# 0 F3 LDM 0 B3 UDM 0 K9 ODT 0 F7 LDQS 0 E8 LDQS MEM_QS1 MEM_QS1# 0 B7 UDQS 0 A8 UDQS 1.8 J2 VREF NC 0 A2 NC 0 E2 NC 0 L1 NC 0 R3 NC 0 R7 NC 0 R8 NC#A2 NC#E2 NC#L1 NC#R3 NC#R7 NC#R8 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 B9 0 B1 0 D9 0 D1 0 D3 0 D7 0 C2 0 C8 0 F9 0 F1 0 H9 0 H1 0 H3 0 H7 0 G2 0 G8 0 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 A9 1.8 C1 1.8 C3 1.8 C7 1.8 C9 1.8 E9 1.8 G1 1.8 G3 1.8 G7 1.8 G9 1.8 VDD1 VDD2 VDD3 VDD4 VDD5 A1 1.8 E1 1.8 J9 1.8 M9 1.8 R1 1.8 VDDL J1 1.8 VSSDL J7 0 VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9 VSSQ10 A7 0 B2 0 B8 0 D2 0 D8 0 E7 0 F2 0 F8 0 H2 0 H8 0 VSS1 VSS2 VSS3 VSS4 VSS5 A3 0 E3 0 J3 0 N1 0 P9 0 C2488 0.1 B C2489 1B MEM_DQA14 MEM_DQA12 MEM_DQA15 MEM_DQA9 MEM_DQA8 MEM_DQA13 MEM_DQA11 MEM_DQA10 MEM_DQA6 MEM_DQA7 MEM_DQA2 MEM_DQA3 MEM_DQA4 MEM_DQA0 MEM_DQA5 MEM_DQA1 C2481 C2482 C2483 C2484 C2485 C2492 0.1 B C2493 0.1 B C2494 0.1 B C2495 0.1 B C2496 0.1 B 1B 0.1 B 1B 0.1 B 1B C2497 1 B C2486 0.1 B C2498 1 B C2487 0.1 B C2499 1 B B2406 FCM1608KF-151T06 C2490 6.3V 220 MZA R2420 R2421 C2480 1K +-1% 1K +-1% 0.1 B 1 NOTE: THIS SCHEMATIC DIAGRAM IS THE LATEST AT THE TIME NOTE:THE DC VOLTAGE AT EACH PART WAS MEASURED OF PRINTING AND SUBJECT TO CHANGE WITHOUT NOTICE WITH THE DIGITAL TESTER WHEN THE COLOR BROADCAST WAS RECEIVED IN GOOD CONDITION AND PICTURE IS NORMAL. A B C H-3 D E F G H 8 7 6 5 4 3 2 PCBDH0 CEF276 H 1 H-4

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A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
2
1
3
4
5
6
7
8
2
1
3
4
5
6
7
8
C2490
220
6.3V
MZA
OF PRINTING AND SUBJECT TO CHANGE WITHOUT NOTICE
NOTE:THIS SCHEMATIC DIAGRAM IS THE LATEST AT THE TIME
WAS RECEIVED IN GOOD CONDITION AND PICTURE IS NORMAL.
WITH THE DIGITAL TESTER WHEN THE COLOR BROADCAST
NOTE:THE DC VOLTAGE AT EACH PART WAS MEASURED
JG2411
B2406
FCM1608KF-151T06
B2405
FCM1608KF-151T06
R2421
1K+-1%
R2420
1K+-1%
R2412
15 +-1%
R2415
15 +-1%
R2416
15 +-1%
R2417
10K
R2418
1K+-1%
R2419
1K+-1%
R2413
1K +-1%
R2414
1K +-1%
C2461
0.1
B
C2479
0.1
B
C2480
0.1 B
C2456
10 C
C2460
0.1
B
C2462
0.1 B
C2475
0.1 B
C2471
0.1 B
C2467
0.1 B
C2472
1B
C2470
1B
C2473
0.1 B
C2474
1B
C2469
0.1 B
C2468
1B
C2466
1B
C2465
0.1 B
C2464
1B
C2463
0.1 B
C2476
1B
C2478
10 C
C2477
0.1 B
C2482
0.1 B
C2484
0.1 B
C2486
0.1 B
C2487
0.1 B
C2485
0.1 B
C2483
0.1 B
C2494
1B
C2496
1B
C2497
1B
C2498
1B
C2499
1B
C2493
0.1 B
C2495
0.1 B
C2481
0.1 B
C2492
1B
C2458
0.1 B
C2459
0.1 B
C2457
0.1 B
C2488
0.1 B
C2489
1
B
E24
AC24
G26
D20
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
J1
J7
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A1
E1
J9
M9
R1
M2
D7
R2
D1
D9
L3
B1
IC2402
HYB18T512161BF-25
512Mbit DDR2 SDRAM IC
L2
B9
P7
D3
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
J2
R3
R7
R8
A2
E2
L1
K2
K8
J8
B3
F3
K9
F7
E8
B7
A8
K3
L8
L7
K7
D21
D22
F23
G23
G24
H23
K23
U23
V23
W23
Y23
AC19
AC20
AC21
AC22
M23
J23
AC23
L23
D24
R23
T23
AD25
AB23
AC25
G25
AD26
H25
H26
AA26
AA25
H24
W25
J26
U25
K26
U24
K25
Y24
K24
V25
L26
V26
L25
T26
M26
Y25
M25
W24
M24
Y26
N24
T24
P26
T25
P25
W26
P24
V24
U26
AA24
AC26
L24
AB25
N25
AB24
J24
R26
N26
AB26
J25
R25
IC2401
X242
ATSC/CLEAR CABLE ASIC IC
R24
MEM_DQA0
MEM_AA0
MEM_AA15
MEM_DQA14
MEM_DQA1
MEM_AA1
MEM_AA14
MEM_DQA12
MEM_DQA2
MEM_AA2
MEM_DQA15
MEM_DQA3
MEM_AA3
MEM_AA12
MEM_DQA9
MEM_DQA4
MEM_AA4
MEM_AA11
MEM_DQA8
MEM_DQA5
MEM_AA5
MEM_AA10
MEM_DQA13
MEM_DQA6
MEM_AA6
MEM_AA5
MEM_DQA11
MEM_DQA7
MEM_AA7
MEM_AA7
MEM_DQA10
MEM_DQA8
MEM_AA8
MEM_AA2
MEM_DQA6
MEM_DQA9
MEM_AA9
MEM_AA6
MEM_DQA7
MEM_DQA10
MEM_AA10
MEM_AA8
MEM_DQA2
MEM_DQA11
MEM_AA11
MEM_AA4
MEM_DQA3
MEM_DQA12
MEM_AA12
MEM_AA3
MEM_DQA4
MEM_DQA13
MEM_AA13
MEM_AA9
MEM_DQA0
MEM_DQA14
MEM_AA14
MEM_AA1
MEM_DQA5
MEM_DQA15
MEM_AA15
MEM_AA0
MEM_DQA1
MRAS#
MCLK#
MEM_DQM0#
MCAS#
MCLK
MEM_DQM1#
MRWE#
MCS#
MCKEN
MEM_QS0
MEM_ODT
MEM_QS0#
MCKEN
MEM_QS1
MCLK
MCS#
MEM_QS1#
MCLK#
MRWE#
MRAS#
MCAS#
MEM_DQM0#
MEM_DQM1#
MEM_ODT
MEM_QS0
MEM_QS0#
MEM_QS1
MEM_QS1#
+3.3V
VDDC_1.0V
GND
+2.5V_IO
MEM[1.8V]
H-4
H-3
PCBDH0
CEF276
SDRAM SCHEMATIC DIAGRAM
PESD_1
MPVDD
MVREFS
VDDR1_0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VSS1
VSS2
VSS3
VSS4
VSS5
VSSQ10
VSSQ9
VSSQ8
VSSQ7
VSSQ6
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1
VSSDL
VDDL
VDD5
VDD4
VDD3
VDD2
VDD1
DQ10
DQ12
DQ13
DQ14
DQ15
DQ11
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
A10/AP
A12
BA1
BA0
A11
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CK
CK
CKE
CS
WE
RAS
CAS
LDM
UDM
ODT
LDQS
LDQS
UDQS
UDQS
VREF
NC#A2
NC#E2
NC#L1
NC#R3
NC#R7
NC#R8
NC
NC
NC
NC
NC
NC
VDDR1_1
VDDR1_2
VDDR1_3
VDDR1_4
VDDR1_5
VDDR1_6
VDDR1_7
VDDR1_8
VDDR1_9
VDDR1_10
VDDR1_11
VDDR1_12
VDDR1_13
VDDR1_14
VDDR1_15
VSSR_MEM_ST_A0
VSSR_MEM_ST_A1
MEM_IO2.5_3
MEM_IO2.5_2
MEM_IO2.5_1
VDDRH0
VSSRH0
MPVSS
PESD_2
MEMTEST
MVREFD
TEST_YCLK
DQA15
DQMA#1
MAA15
WEA#
DQA14
MAA14
DQA13
MAA13
DQA12
MAA12
DQA11
MAA11
DQA10
MAA10
DQA9
MAA9
DQA8
MAA8
DQA7
MAA7
DQA6
MAA6
DQA5
MAA5
DQA4
MAA4
DQA3
MAA3
DQA2
MAA2
DQA1
MAA1
DQA0
MAA0
CASA#
RASA#
DQMA#0
QSA0
ODTA
QSA1
CLKA
QSA0#
CKEA
QSA1#
CLKA#
(5/14 SDRAM)
CSA#
(DIGITAL PCB)
FROM/TO POWER3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3.3
3.3
1.0
0
0
1.8
1.8
0
0
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
2.5
2.5
2.5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
0
1.8
1.8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0