Sony HCD-MDX10 Service Manual - Page 40

Block Diagrams, Bd Cd

Page 40 highlights

HCD-MDX10 8-2. BLOCK DIAGRAMS - BD (CD) SECTION - OPTICAL PICK-UP BLOCK (KSS-213D/K-NP) DETECTOR E AC BD VCC VC A C D B F 5A 7C 8D 6B IC103 RF AMP RF SUMMING AMP RF EQ AMP RF 16 FOCUS ERROR AMP FF 14 E F FD LASER DIODE PD 11 E 10 F LD DRIVE Q101 LD 3 4 PD VREF TRACKING ERROR AMP TE 13 APCLD/PD AMP VC BUFFER 12 VC LDON 22 LD POWER IC102 FOCUS/TRACKING COIL DRIVE SPINDLE/SLED MOTOR DRIVE HOLD SW REF 21 15 TRACKING COIL FOCUS COIL T+ 11 CH2OUTR T- 12 CH2OUTF F+ 14 CH1OUTF F- 13 CH1OUTR CH2FIN 5 TFDR CH2RIN 6 TRDR CH1FIN 2 FFDR CH1RIN 3 FRDR M102 SD+ 17 CH3OUTF SLED M MOTOR SD- 18 CH3OUTR M101 SP+ 15 CH4OUTF SPINDLE M MOTOR SP- 16 CH4OUTR CH3RIN 23 SRDR CH3FIN 24 SFDR CH4SIN 25 CH4BIN 27 VC MUTE 20 • SIGNAL PATH : CD 09 : PB (Digital out) IC101 DIGITAL SERVO DIGITAL SIGNAL PROCESSOR 51 RF AC 16K RAM EFM DEMODULATION DATA BUS ERROR CORRECTOR D/A INTERFACE TIMING LOGIC XTA1 66 STAO 67 DIGITAL OUT D OUT 60 X101 16.9344MHz DOUT INTEGRATOR 49 ASY1 48 ASY0 ASYMMETRY CORRECTION DIGITAL PLL VC INTEGRATOR VC 38 CE 42 RFDC 43 FE 39 TE 41 SE 40 OPERATIONAL AMPLIFIER ANALOG SWITCH A/D CONVERTER 42 CE TFDR 30 TRDR 31 FFDR 32 FRDR 33 SRDR 29 SFDR 28 PWM GENERATOR TRACKING PWM GENERATOR FOCUS PWM GENERATOR SLED PWM GENERATOR MDP 26 DIGITAL CLV SERVO DSP TRACKING SERVO FOCUS SERVO SLED SERVO SUBCODE PROCESSOR SERIAL IN INTERFACE OVER SAMPLING DIGITAL FILTER 3rd ORDER NOISE SHAPER PWM PWM SERVO AUTO SEQUENCER CPU INTERFACE XRST 3 SQSO 1 SQCK 2 SENS 8 DATA 5 XLAT 6 CLOK 7 SCOR 20 XLON 14 SERVO INTERFACE SCLK 9 SSTP 27 S101 RMUT LIMIT SW 79 LMUT 80 LMUT 70 AIN1 71 LOUT1 72 LOUT2 77 AIN2 76 LOUT2 75 XRST SQSO SENS DATA XLT CLOK SCOR SQCK +5V G MAIN SECTION (Page 47) L OUT R OUT HOLD - 41 - - 42 -

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
  • 97
  • 98
  • 99
  • 100
  • 101
  • 102
  • 103
  • 104
  • 105
  • 106
  • 107
  • 108
  • 109
  • 110
  • 111
  • 112

HCD-MDX10
8-2. BLOCK DIAGRAMS
– BD (CD) SECTION –
– 41 –
– 42 –
E
F
A
B
C
D
A
C
RF
FF
TE
D
B
E
F
LD
PD
VCC
VC
RF
SUMMING
AMP
FOCUS
ERROR
AMP
TRACKING
ERROR
AMP
LD
DRIVE
Q101
VC
BUFFER
INTEG-
RATOR
RF EQ
AMP
INTEG-
RATOR
DIGITAL
PLL
IC101
DIGITAL SERVO
DIGITAL SIGNAL PROCESSOR
SUBCODE
PROCESSOR
SERIAL IN
INTERFACE
SERVO
AUTO
SEQUENCER
SERVO
INTERFACE
OVER SAMPLING
DIGITAL FILTER
D/A
INTERFACE
DIGITAL
OUT
TIMING
LOGIC
ERROR
CORRECTOR
EFM
DEMODULATION
APCLD/PD
AMP
5
7
8
6
16
14
49
51
13
LDON
VC
22
15
21
12
11
10
3
IC103
RF AMP
VC
4
VREF
HOLD SW
REF
IC102
FOCUS/TRACKING COIL DRIVE
SPINDLE/SLED MOTOR DRIVE
11
12
T+
T–
14
13
F+
F–
TRACKING
COIL
FOCUS
COIL
CH2OUTR
CH2OUTF
5
CH2FIN
6
CH2RIN
2
CH1FIN
3
CH1RIN
23
CH3RIN
24
CH3FIN
25
CH4SIN
27
CH4BIN
20
MUTE
CH1OUTF
CH1OUTR
17
18
SD+
SD–
CH3OUTF
CH3OUTR
M
15
16
SP+
SP–
CH4OUTF
CH4OUTR
M
M102
SLED
MOTOR
M101
SPINDLE
MOTOR
TFDR
TRDR
FFDR
FRDR
SRDR
SFDR
VC
FD
PD
LASER
DIODE
A
C
D
B
E
F
DETECTOR
OPTICAL PICK-UP BLOCK
(KSS-213D/K-NP)
LD
POWER
RF AC
ASY1
48
38
42
43
39
41
40
28
26
29
ASY0
ASYMMETRY
CORRECTION
SFDR
MDP
SRDR
33
32
FRDR
FFDR
31
30
42
TRDR
TFDR
SE
CE
TE
FE
RFDC
CE
VC
SLED
PWM
GENERATOR
FOCUS
PWM
GENERATOR
TRACKING
PWM
GENERATOR
PWM
GENERATOR
SLED
SERVO
FOCUS
SERVO
TRACKING
SERVO
SERVO DSP
DIGITAL
CLV
OPERATIONAL
AMPLIFIER
ANALOG
SWITCH
A/D
CONVERTER
16K
RAM
DATA BUS
3rd ORDER
NOISE SHAPER
PWM
PWM
CPU
INTERFACE
2
1
3
SQSO
60
D OUT
67
STAO
66
XTA1
8
SENS
20
SCOR
14
XLON
XRST
SQCK
5
DATA
6
XLAT
7
CLOK
9
SCLK
27
SSTP
79
RMUT
80
LMUT
70
LMUT
71
AIN1
72
LOUT1
77
LOUT2
76
AIN2
75
LOUT2
L OUT
R OUT
HOLD
+5V
SQCK
SCOR
CLOK
XLT
DATA
SENS
SQSO
XRST
DOUT
X101
16.9344MHz
G
MAIN
SECTION
(Page 47)
09
S101
LIMIT SW
• SIGNAL PATH
: CD
: PB (Digital out)