Toshiba 23HLV87 Circuit Diagrams - Page 13

Demodulator Schematic Diagram - 23

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A B C D E F G H DEMODULATOR SCHEMATIC DIAGRAM 8 (MAIN PCB) 8 C307 0.1u CA63 100uF/10V C144 VDD33OPH VSSOH D_IN4 D_IN5 D_IN6 D_IN7 VDD12IH VSSIPH D_IN8 D_IN9 D_IN10 D_IN11 VDD12IH CLK_EXT_ADC VSSIPH VDD33OPH OSC_XOUT OSC_XIN VSSOH VDD12T_ABB VSSBB_ABB FILTER VBB_ABB VSST_ABB VDD12T_ABB RESET_N IN OUT ADJ IN OUT ADJ POWER FOR DEMODULATOR 7 4 4 U39 AMS1117-1.2V U40 AMS1117-3.3V 5V8_DE/TU 5VA-DE 3 2 1 3 2 1 +3.3V_De +1.2V_De L69 +3.3V_De 220uF/10V CA61 100uF/10V C306 470p CA62 10uH + + + 0.1u C305L c141 10U c128 10U 10U C130 10U C304 0.1u C303 470p 0.1u C302 C140 10U 6 c129 10U REF_BOT C299 0.1u + C300 10uF/16V REF_TOP C308 0.1u + C309 10uF/16V L68 1uH C296 620pF C297 39pF X1 49.38111MHz C298 39pF VDD_33 VDD_12 VDD_33 VDD_12 VDD_12 VDD_12 C301 1500pF 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 U41 I2CADDR0 I2CADDR1 S5H1409 Device ID VCC VCC 0xF2 VCC GND 0x72 7 GND VCC 0xB2 GND GND 0x32 +3.3V_De +3.3V_De +3.3V_De R383 1K EXT_PLL_SEL I2CADDR1 I2CADDR0 R384 1K R385 1K R386 NC/1K R387 NC/1K R388 NC/1K 6 5 +1.2V_De L70 VDD_12 +3.3V_De L71 VDD_33 600/0805 600/0805 + C324 C311L C312 C313 C314 C315 C159 C326 + C316 C317C318 C319 C320 C321 C322 C323 C362 C363 C158 10uF 100nF 100nF 100nF 100nF 100nF 10U 10uF 100nF 100nF100nF 100nF 100nF 100nF 100nF 100nF 10U 10U 10U VDD_12 VDD_12 C181 C160 10U 10U C331 C332 C334 C335 C336 C161 C182 100nF 100nF 100nF 100nF 100nF 10U 10U C339 C340 C341 C342 C343 C361 100nF 100nF 100nF 100nF 100nF 10U #IFA IFA #IFA IFA C310 0.1uVDD_33 REF_BOT REF_TOP VDD_33 VDD_12 IF_AGC RF_AGC +3.3V_De R391 IF_AGC R393 C337 22p R395 5VA-DE VDD_12 220 VDD_12 NC NC VDD_33 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 VSSBBH_ABB VDD33TH_ABB CML RN RP AIN AIP VSSBBTH_ABB VDD33TH_ABB VSSIPH VDD12IH D_IN3 D_IN2 D_IN1 D_IN0 VDD12IH VSSIPH VDD12IH VSSIPH IF_GAIN TU_GAIN GPIO_OUT1 TUNER_CLK VDD33OPH VSSOH VDD12IH VSSIPH TEST_SEL0 TEST_SEL1 TEST_SEL2 VDD12IH VSSIPH TEST_SEL3 TEST_SEL4 VDD33OPH VSSOH I2CADDR1 I2CADDR0 SCL SDA VDD12IH VSSIPH EXT_PLL_SEL PKVAL VDD12IH VSSIPH PKERR PKSYNC VDD33OPH VSSOH 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 VDD_12 VDD_12 SDA SCL R389 R390 VDD_33 I2CADDR1 I2CADDR0 SCL SDA VDD_12 C329 C330 22p 22p EXT_PLL_SEL R392 VDD_12 D14 LED_Red PEKERR 2 1 R394 R396 VDD_33 10 MSDA 10 MSCL MSDA MSCL 100 TSVALID 1K 5VA-DE 100 TSSTART 5 TUNER_SDA GPIO_IN1 VDD12IH VSSIPH PKDATA7 PKDATA6 PKDATA5 PKDATA4 VDD12IH VSSIPH PKDATA3 PKDATA2 PKDATA1 PKDATA0 VDD33OPH VSSOH RESET_N TEST_BIRA TEST_SIG0 TEST_SIG1 VDD12IH VSSIPH TEST_SIG2 TEST_SIG3 PKCLK C54 0.1u RA3 10K C53 0.1u C40 0.1u C41 1U 4 5V8IN U4 1 2 3 4 S G S G D D D D 8 7 6 5 IRF7304 5V_DE/TU + EC1 100uF/16V PS_ON RA5 Q8 10K 3904 3 T_SCL T_SDA 100 100 5VA 10K 10K R397 R398 R399 R400 C344C345 22p 22p S5H1409 +3.3V_De SYS-RESET R403 10K R402 10K Q25 3904 RESET_N AGND VDD_12 VDD_12 VDD_33 VDD_12 DGND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 4 R401 330 TSCLK RP20 RP21 7 5 31 75 31 86428642 330X4 TS0 TS1 TS0 TS1 TS2 TS3 330X4 TS4 TS5 TS2 TS3 TS4 TS5 TS6 TS7 TS6 TS7 3 Should be close to MSD116L and MST3xxxMB !!! 2 2 1 1 A B C D E F G H H-9 H-10

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2
1
3
4
5
6
7
8
2
1
3
4
5
6
7
8
H-10
H-9
(MAIN PCB)
DEMODULATOR SCHEMATIC DIAGRAM
A
H
B
C
D
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RESET_N
5
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6
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7
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0
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4
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K
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4
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K
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3
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0
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3
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0
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1
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2
1
3
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F
n
0
0
1
2
1
3
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F
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0
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1
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3
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1
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3
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F
n
0
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1
9
2
3
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p
2
2
9
2
3
C
p
2
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CA61
100uF/10V
+
CA61
100uF/10V
C307
0.1u
C307
0.1u
3
0
4
R
K
0
1
3
0
4
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K
0
1
H
u
1
8
6
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H
u
1
8
6
L
8
9
3
R
0
0
1
8
9
3
R
0
0
1
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10U
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10U
2
3
3
C
F
n
0
0
1
2
3
3
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F
n
0
0
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9
3
3
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F
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0
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3
3
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F
n
0
0
1
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4
2
3
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F
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0
1
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4
2
3
C
F
u
0
1
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470p
C303
470p
+
9
0
3
C
V
6
1
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F
u
0
1
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9
0
3
C
V
6
1
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u
0
1
C144
10U
C144
10U
0
3
3
1
0
4
R
0
3
3
1
0
4
R
1
2
3
C
F
n
0
0
1
1
2
3
C
F
n
0
0
1
C304
0.1u
C304
0.1u
7531
8642
4
X
0
3
3
0
2
P
R
7531
8642
4
X
0
3
3
0
2
P
R
1
3
3
C
F
n
0
0
1
1
3
3
C
F
n
0
0
1
F
p
9
3
7
9
2
C
F
p
9
3
7
9
2
C
C40
0.1u
C40
0.1u
TUNER_SDA
1
GPIO_IN1
2
VDD12IH
3
VSSIPH
4
PKDATA7
5
PKDATA6
6
PKDATA5
7
PKDATA4
8
VDD12IH
9
VSSIPH
10
PKDATA3
11
PKDATA2
12
PKDATA1
13
PKDATA0
14
VDD33OPH
15
VSSOH
16
RESET_N
17
TEST_BIRA
18
TEST_SIG0
19
TEST_SIG1
20
VDD12IH
21
VSSIPH
22
TEST_SIG2
23
TEST_SIG3
24
PKCLK
25
VDD33OPH
75
VDD12T_ABB
56
VSSOH
74
VBB_ABB
53
D_IN4
73
VSST_ABB
52
D_IN5
72
VSSIPH
61
D_IN6
71
OSC_XIN
58
D_IN7
70
VSSBB_ABB
55
VDD12IH
69
VDD12T_ABB
51
VSSIPH
68
OSC_XOUT
59
D_IN8
67
VDD33OPH
60
D_IN9
66
VSSOH
57
D_IN10
65
FILTER
54
D_IN11
64
CLK_EXT_ADC
62
VDD12IH
63
1
R
D
D
A
C
2
I
9
3
H
I
2
1
D
D
V
0
5
0
R
D
D
A
C
2
I
8
3
L
C
S
7
3
H
P
I
S
S
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9
4
A
D
S
6
3
0
L
E
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T
8
4
H
I
2
1
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D
V
5
3
4
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2
4
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P
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4
3
1
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7
4
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3
3
2
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T
6
4
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A
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K
P
2
3
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I
2
1
D
D
V
5
4
H
I
2
1
D
D
V
1
3
H
P
I
S
S
V
4
4
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P
I
S
S
V
0
3
3
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E
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S
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T
3
4
R
R
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K
P
9
2
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O
S
S
V
0
4
C
N
Y
S
K
P
8
2
H
P
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3
3
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D
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1
4
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3
3
D
D
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7
2
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O
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6
2
B
B
A
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T
3
3
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7
7
B
B
A
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H
B
B
S
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6
7
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M
C
8
7
N
R
9
7
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R
0
8
B
B
A
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T
B
B
S
S
V
3
8
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I
A
2
8
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B
A
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T
3
3
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D
V
4
8
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A
1
8
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5
8
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I
2
1
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D
V
6
8
3
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I
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7
8
2
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8
8
1
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9
8
0
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D
0
9
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I
2
1
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1
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2
9
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3
9
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4
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0
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4
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9
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4
1
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5
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1
4
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9
0
4
1
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5
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F
p
0
2
6
6
9
2
C
F
p
0
2
6
6
9
2
C
5
A
R
K
0
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5
A
R
K
0
1
4
3
3
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F
n
0
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4
3
3
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F
n
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9
9
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u
1
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0
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9
2
C
u
1
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0
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1
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3
C
u
1
.
0
0
1
3
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0
1
9
8
3
R
0
1
9
8
3
R
C140
10U
C140
10U
6
3
3
C
F
n
0
0
1
6
3
3
C
F
n
0
0
1
7
1
3
C
F
n
0
0
1
7
1
3
C
F
n
0
0
1
C301
1500pF
C301
1500pF
4
8
3
R
K
1
4
8
3
R
K
1
8
Q
4
0
9
3
8
Q
4
0
9
3
3
1
3
C
F
n
0
0
1
3
1
3
C
F
n
0
0
1
1
6
3
C
U
0
1
1
6
3
C
U
0
1
C302
0.1u
C302
0.1u
7
3
3
C
p
2
2
7
3
3
C
p
2
2
C305L
0.1u
C305L
0.1u
4
1
3
C
F
n
0
0
1
4
1
3
C
F
n
0
0
1
2
6
3
C
U
0
1
2
6
3
C
U
0
1
4
4
3
C
p
2
2
4
4
3
C
p
2
2
F
p
9
3
8
9
2
C
F
p
9
3
8
9
2
C
0
2
3
C
F
n
0
0
1
0
2
3
C
F
n
0
0
1
+
0
0
3
C
V
6
1
/
F
u
0
1
+
0
0
3
C
V
6
1
/
F
u
0
1
RA3
10K
RA3
10K
9
9
3
R
K
0
1
9
9
3
R
K
0
1
C41
1U
C41
1U
3
8
3
R
K
1
3
8
3
R
K
1
8
1
3
C
F
n
0
0
1
8
1
3
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F
n
0
0
1
8
0
3
C
u
1
.
0
8
0
3
C
u
1
.
0
3
2
1
4
ADJ
OUT
IN
9
3
U
V
2
.
1
-
7
1
1
1
S
M
A
ADJ
OUT
IN
9
3
U
V
2
.
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