Via EPIA-PX10000G User Manual - Page 61

DRAM Clock, Auto Detect PCI Clk, Spread Spectrum

Get Via EPIA-PX10000G - VIA Motherboard - Pico ITX PDF manuals and user guides
UPC - 825529001969
View all Via EPIA-PX10000G manuals
Add to My Manuals
Save this manual to your list of manuals

Page 61 highlights

FREQUENCY / VOLTAGE CONTROL Phoenix - AwardBIOS CMOS Setup Utility Frequency / Voltage Control DRAM Clock/Drive Control Auto Detect PCI Clk Spread Spectrum [Press Enter] [Enabled] [Disabled] Item Help Menu Level BIOS Setup : Move Enter: Select F5: Previous Values +/-/PU/PD: Value F10: Save F6: Fail-Safe Defaults ESC: Exit F1: General Help F7: Optimized Defaults DRAM Clock The chipset supports synchronous and asynchronous mode between host clock and DRAM clock frequency. Settings: [By SPD, 100 MHz, 133 MHz, 166 MHz, 200MHz, 266MHz] Auto Detect PCI Clk Settings: [Disabled, Enabled] Spread Spectrum When the mainboard's clock generator pulses, the extreme values (spikes) of the pulses create EMI (Electromagnetic Interference). The Spread Spectrum function reduces the EMI generated by modulating the pulses so that the spikes of the pulses are reduced to flatter curves. Settings: [Disabled, 0.20%, 0.25%, 0.35%] 49

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
BIOS Setup
49
F
REQUENCY
/
V
OLTAGE
C
ONTROL
: Move
F5: Previous Values
F6: Fail-Safe Defaults
F7: Optimized Defaults
Enter: Select
+/-/PU/PD: Value
F10: Save
ESC: Exit
F1: General Help
Menu Level
Item Help
DRAM Clock/Drive Control
[Press Enter]
Auto Detect PCI Clk
[Enabled]
Spread Spectrum
[Disabled]
Frequency / Voltage Control
Phoenix - AwardBIOS CMOS Setup Utility
DRAM Clock
The chipset supports synchronous and asynchronous mode between host
clock and DRAM clock frequency.
Settings: [By SPD, 100 MHz, 133 MHz, 166 MHz, 200MHz, 266MHz]
Auto Detect PCI Clk
Settings: [Disabled, Enabled]
Spread Spectrum
When the mainboard's clock generator pulses, the extreme values (spikes) of
the pulses create EMI (Electromagnetic Interference).
The Spread Spectrum
function reduces the EMI generated by modulating the pulses so that the
spikes of the pulses are reduced to flatter curves.
Settings: [Disabled, 0.20%, 0.25%, 0.35%]