ASRock X99 OC Formula/3.1 User Manual - Page 84

Tcccd, Tcccd_l, Tcccd_wr_l, Trwsr, Trwdd, Trwdr, Twrdd, Twrdr, Twwdd

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Page 84 highlights

tCKE Conigure the period of time the DDR4 initiates a minimum of one refresh command internally once it enters Self-Refresh mode. tCCCD Conigure back to back CAS to CAS (i.e. READ to RAED or WRITE to WRITE) from same rank separation parameter. tCCCD_L Conigure back to back CAS to CAS (i.e. READ to RAED or WRITE to WRITE) from same rank separation parameter. tCCCD_WR_L Conigure back to back CAS to CAS (i.e. READ to RAED or WRITE to WRITE) from same rank separation parameter. tRWSR Conigure READ to WRITE same rank dead cycle Back to back READ to WRITE from same rank separation parameter. tRWDD Conigure Read to Write diferent DIMM dead cycle Back to back READ to WRITE from diferent DIMM separation parameter. tRWDR Conigure Read to Write diferent rank dead cycle Back to back READ to WRITE from diferent rank separation parameter. tWRDD Conigure Write to Read diferent DIMM dead cycle Back to back READ to WRITE from diferent DIMM separation parameter. tWRDR Conigure Write to Read diferent rank dead cycle Back to back READ to WRITE from diferent rank separation parameter. tWWDD Conigure Write to Write diferent DIMM dead cycle Back to back READ to WRITE from diferent DIMM separation parameter. 78 English

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78
English
tCKE
Con±gure the period of time the DDR4 initiates a minimum of one refresh
command internally once it enters Self-Refresh mode.
tCCCD
Con±gure back to back CAS to CAS (i.e. READ to RAED or WRITE to WRITE)
from same rank separation parameter.
tCCCD_L
Con±gure back to back CAS to CAS (i.e. READ to RAED or WRITE to WRITE)
from same rank separation parameter.
tCCCD_WR_L
Con±gure back to back CAS to CAS (i.e. READ to RAED or WRITE to WRITE)
from same rank separation parameter.
tRWSR
Con±gure READ to WRITE same rank dead cycle Back to back READ to WRITE
from same rank separation parameter.
tRWDD
Con±gure Read to Write diµerent DIMM dead cycle Back to back READ to WRITE
from diµerent DIMM separation parameter.
tRWDR
Con±gure Read to Write diµerent rank dead cycle Back to back READ to WRITE
from diµerent rank separation parameter.
tWRDD
Con±gure Write to Read diµerent DIMM dead cycle Back to back READ to WRITE
from diµerent DIMM separation parameter.
tWRDR
Con±gure Write to Read diµerent rank dead cycle Back to back READ to WRITE
from diµerent rank separation parameter.
tWWDD
Con±gure Write to Write diµerent DIMM dead cycle Back to back READ to
WRITE from diµerent DIMM separation parameter.