ASRock Z490 Pro4 User Manual - Page 71

Realtime Memory Timing, MRS tCCD_L

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Z490 Pro4 Clock Slew Rate Adjust Clock Slew Rate for better signal. Default is 53. Dll Bandwidth 0 Configure Dll Bandwidth 0 (1067 MHz) to maximize the performance of intergrated memory controller. Dll Bandwidth 1 Configure Dll Bandwidth 1 (1333 MHz) to maximize the performance of intergrated memory controller. Dll Bandwidth 2 Configure Dll Bandwidth 2 (1600 MHz) to maximize the performance of intergrated memory controller. Dll Bandwidth 3 Configure Dll Bandwidth 3 (1867 MHz) to maximize the performance of intergrated memory controller. MRS Setting MRS tCL Configure the tCL for Memory MRS MR0. MRS tWRtRTP Configure the tWRtRTP for Memory MRS MRC. MRS tCWL Configure the tCWL for Memory MRS MR2. MRS tCCD_L Configure the tCL for Memory MRS MR6. Advanced Setting ASRock Timing Optimization Configure the fast path through the MRC. Realtime Memory Timing Configure the realtime memory timings. 65 English

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65
English
Z490 Pro4
Clock Slew Rate
Adjust Clock Slew Rate for better signal. Default is 53.
Dll Bandwidth 0
Configure Dll Bandwidth 0 (1067 MHz) to maximize the performance of
intergrated memory controller.
Dll Bandwidth 1
Configure Dll Bandwidth 1 (1333 MHz) to maximize the performance of intergrated
memory controller.
Dll Bandwidth 2
Configure Dll Bandwidth 2 (1600 MHz) to maximize the performance of
intergrated memory controller.
Dll Bandwidth 3
Configure Dll Bandwidth 3 (1867 MHz) to maximize the performance of intergrated
memory controller.
MRS Setting
MRS tCL
Configure the tCL for Memory MRS MR0.
MRS tWRtRTP
Configure the tWRtRTP for Memory MRS MRC.
MRS tCWL
Configure the tCWL for Memory MRS MR2.
MRS tCCD_L
Configure the tCL for Memory MRS MR6.
Advanced Setting
ASRock Timing Optimization
Configure the fast path through the MRC.
Realtime Memory Timing
Configure the realtime memory timings.