ASRock Z690M PG Riptide/D5 User Manual - Page 75

Initial RTL MC1 C1 B1/B2

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Z690M PG Riptide/D5 Initial RTL (MC1 C1 B1/B2) Configure round trip latency initial value. RTL (MC0 C0 A1/A2) Configure round trip latency value. RTL (MC0 C1 A1/A2) Configure round trip latency value. RTL (MC1 C0 B1/B2) Configure round trip latency value. RTL (MC1 C1 B1/B2) Configure round trip latency value. ODT Setting Dimm ODT Training ODT values will be optimized by Dimm On-Die Termination Training. ODT WR (A1) Configure the memory on die termination resistors' WR for channel A1. ODT WR (A2) Configure the memory on die termination resistors' WR for channel A2. ODT WR (B1) Configure the memory on die termination resistors' WR for channel B1. ODT WR (B2) Configure the memory on die termination resistors' WR for channel B2. ODT NOM Rd (A1) Configure the memory on die termination resistors' NOM Rd for channel A1. ODT NOM Rd (A2) Configure the memory on die termination resistors' NOM Rd for channel A2. ODT NOM Rd (B1) Configure the memory on die termination resistors' NOM Rd for channel B1. 67 English

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67
English
Z690M PG Riptide/D5
Initial RTL (MC1 C1 B1/B2)
Configure round trip latency initial value.
RTL (MC0 C0 A1/A2)
Configure round trip latency value.
RTL (MC0 C1 A1/A2)
Configure round trip latency value.
RTL (MC1 C0 B1/B2)
Configure round trip latency value.
RTL (MC1 C1 B1/B2)
Configure round trip latency value.
ODT Setting
Dimm ODT Training
ODT values will be optimized by Dimm On-Die Termination Training.
ODT WR (A1)
Configure the memory on die termination resistors' WR for channel A1.
ODT WR (A2)
Configure the memory on die termination resistors' WR for channel A2.
ODT WR (B1)
Configure the memory on die termination resistors' WR for channel B1.
ODT WR (B2)
Configure the memory on die termination resistors' WR for channel B2.
ODT NOM Rd (A1)
Configure the memory on die termination resistors' NOM Rd for channel A1.
ODT NOM Rd (A2)
Configure the memory on die termination resistors' NOM Rd for channel A2.
ODT NOM Rd (B1)
Configure the memory on die termination resistors' NOM Rd for channel B1.