Acer Aspire E360 Aspire T160/Aspire E360 Service Guide - Page 82

Initialize the APIC for P6 class CPU., Program writes allocation for AMD K5 CPU.

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Checkpoint 3Fh 40h 41h 42h 43h 44h 45h 46h 47h 48h 49h 4Ah 4Bh 4Ch 4Dh 4Eh 4Fh 50h 51h 52h 53h 54h 55h 56h 57h 58h 59h 5Ah 5Bh 5Ch 5Dh 5Eh 5Fh 60h Description Reserved Test 8259 interrupt mask bits for channel 2 Reserved Reserved Test 8259 functionality Reserved Reserved Reserved Initialize EISA slot Reserved 1. Calculate total memory by testing the last double word of each 64K. 2. Program writes allocation for AMD K5 CPU. Reserved Reserved Reserved Reserved 1. Program MTRR of M1 CPU. 2. Initialize L2 cache for P6 class CPU & program CPU with proper cacheable range. 3. Initialize the APIC for P6 class CPU. 4. On MP platform, adjust the cacheable range to smaller one in case the cacheable ranges between each CPU are not identical. Reserved Initialize USB Reserved Test all memory (clear all extended memory to 0) Reserved Reserved Display number of processors (multi-processor platform) Reserved 1. Display PnP logo 2. Early ISA PnP initialization -Assign CSN to every ISA PnP device. Reserved Initialize the combined Trend Anti-Virus code. Reserved (Optional Feature) Show message for entering AWDFLASH.EXE from FDD (optional) Reserved 1. Initialize Init_Onboard_Super_I/O switch. 2. Initialize Init_Onboard_AUDIO switch. Reserved Reserved Okay to enter Setup utility; i.e. not until this POST stage can users enter the CMOS setup utility. Chapter 4 73

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