Asus P I-P55TVP4 User Manual - Page 14

ASUS P/I-P55TVP4 User's Manual, Total Level 2 Cache Size Setting, IMPORTANT, See External Cache

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III. INSTALLATION 3. Total Level 2 Cache Size Setting (JP4) This jumper sets the total amount of L2 cache that is present. If you have two cache chips onboard (see "Map of Motherboard" for locations), then you have 256KB. A cache module can be used to upgrade the 256KB version to 512KB. If there is no onboard cache, you may install a cache module of either 256KB or 512KB. IMPORTANT: See "External Cache" for installation procedures. Regardless of your cache combination, set the following jumpers according to the total amount of L2 cache that is present onboard and installed as a module. Selections 256KB 512KB JP4 [2-3] (default) [1-2] JP4 JP4 III. INSTALLATION (Jumpers) 1 2 3 256KB 1 2 3 512KB Total L2 Cache Size Setting (256KB / 512KB) 4. CMOS RAM (JP7) This clears the user-entered information stored in the CMOS RAM of the Real Time Clock such as hard disk information and passwords. To clear the RTC data: (1) Turn off the PC, (2) Short this jumper, (3) Power on the PC, (4) Turn off the PC, (5) Remove this jumper, (6) Power on the PC, (7) Hold down during bootup and enter BIOS setup to re-enter user preferences. Selections Operation Clear CMOS Data JP7 [open] (Default) [short] (momentarily) JP7 Operation (Default) JP7 Clear Data CMOS RAM (Operation / Clear CMOS Data) 8 ASUS P/I-P55TVP4 User's Manual

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ASUS P/I-P55TVP4 User's Manual
8
3.
Total Level 2 Cache Size Setting
(JP4)
This jumper sets the total amount of L2 cache that is present.
If you have two
cache chips onboard (see "Map of Motherboard" for locations), then you have
256KB.
A cache module can be used to upgrade the 256KB version to 512KB.
If there is no onboard cache, you may install a cache module of either 256KB or
512KB.
IMPORTANT:
See "External Cache" for installation procedures.
Regardless of your cache combination, set the following jumpers according to
the
total
amount of L2 cache that is present onboard and installed as a module.
Selections
JP4
256KB
[2-3] (default)
512KB
[1-2]
Total L2 Cache Size Setting (256KB / 512KB)
256KB
512KB
1
2
3
1
2
3
JP4
JP4
4.
CMOS RAM
(JP7)
This clears the user-entered information stored in the CMOS RAM of the Real
Time Clock such as hard disk information and passwords.
To clear the RTC
data:
(1) Turn off the PC, (2) Short this jumper, (3) Power on the PC, (4) Turn
off the PC, (5) Remove this jumper, (6) Power on the PC, (7) Hold down
<Delete> during bootup and enter BIOS setup to re-enter user preferences.
Selections
JP7
Operation
[open]
(Default)
Clear CMOS Data
[short]
(momentarily)
CMOS RAM (Operation / Clear CMOS Data)
JP7
Operation (Default)
Clear Data
JP7
III. INSTALLATION
(Jumpers)
III.
INSTALLATION