Asus P5VD2 VM Motherboard Installation Guide - Page 71

CPU L1 & L2 Cache [Enabled], DRAM Clock/Drive Control - p5v vm se dh

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CPU L1 & L2 Cache [Enabled] Options de configuration: [Disabled] [Enabled] 2.4.2 Chipset Advanced Phoenix-Award BIOS CMOS Setup Utility DRAM Clock/Drive Control Frequency/Voltage control Top Performance Primary Display Adapter VGA Share Memory Size Chipset [Disabled] [PCI-E] [64M] Select Menu Item Specific Help DRAM Clock/Drive Control Advanced Phoenix-Award BIOS CMOS Setup Utility Current DRAM Frequency DRAM Frequency DRAM Timing Selectable x CAS Latency Time x Bank Interleave x Precharge to Active(Trp) x Active to Precharge(Tras) x Active to CMD(Trcd) x REF to ACT/REF(Trfc) x ACT(0) to ACT(1) (TRRD) DRAM Clock/Drive Control 200MHz Auto [By SPD] 4 Disabled 4T 07T 4T 20T/21T 3T Select Menu Item Specific Help DRAM Frequency [Auto] Options de configuration: [Auto] [400 MHz] [533 MHz][667MHz] DRAM Timing Selectable [By SPD] Options de configuration: [Manual] [By SPD] Les éléments suivants ne deviennent configurables que lorsque l'option "DRAM Timing Selectable" est réglée sur [Manual]. CAS Latency Time [2.5] Options de configuration: [2] [2.5] [3] Bank Interleave [4 Bank] Options de configuration: [Disabled] [2 Bank] [4 Bank] [8 Bank] Precharge to Active(Trp) [3T] Options de configuration: [2T] [3T] [4T] [5T] ASUS P5VD2-VM/P5V-VM SE DH 2-21

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ASUS P5VD2-VM/P5V-VM SE DH
2-21
CPU L1 & L2 Cache [Enabled]
Options de configuration: [Disabled] [Enabled]
2.4.2
Chipset
DRAM Clock/Drive Control
DRAM Frequency [Auto]
Options de configuration: [Auto] [400 MHz] [533 MHz][667MHz]
DRAM Timing Selectable [By SPD]
Options de configuration: [Manual] [By SPD]
Les éléments suivants ne deviennent configurables que lorsque l’option “DRAM
Timing Selectable” est réglée sur [Manual].
CAS Latency Time [2.5]
Options de configuration: [2] [2.5] [3]
Bank Interleave [4 Bank]
Options de configuration: [Disabled] [2 Bank] [4 Bank] [8 Bank]
Precharge to Active(Trp) [3T]
Options de configuration: [2T] [3T] [4T] [5T]
Select Menu
Item Specific Help
Phoenix-Award BIOS CMOS Setup Utility
Advanced
Chipset
DRAM Clock/Drive Control
Frequency/Voltage control
Top Performance
[Disabled]
Primary Display Adapter
[PCI-E]
VGA Share Memory Size
[64M]
Select Menu
Item Specific Help
Phoenix-Award BIOS CMOS Setup Utility
Advanced
DRAM Clock/Drive Control
Current DRAM Frequency
200MHz
DRAM Frequency
DRAM Timing Selectable
[By SPD]
x CAS Latency Time
4
x Bank Interleave
Disabled
x Precharge to Active(Trp)
4T
x Active to Precharge(Tras)
07T
x Active to CMD(Trcd)
4T
x REF to ACT/REF(Trfc)
20T/21T
x ACT(0) to ACT(1) (TRRD)
3T
Auto