Asus PCH-DL User Manual - Page 73

DRAM RAS# Precharge [3], Memory Parity Check [Enabled], System BIOS Cacheable [Enabled], Video BIOS

Page 73 highlights

DRAM RAS# to CAS# Delay [3] Controls the latency between the DRAM active command and the read/ write command. Configuration options: [4] [3] [2] DRAM RAS# Precharge [3] This item controls the idle clocks after issuing a precharge command to the DDR SDRAM. Configuration options: [4] [3] [2] Memory Parity Check [Enabled] Allows memory parity checking option (ECC). This item is not userconfiguration but set to [Enabled] by default. 4.4.4 Chipset This menu shows the chipset configuration settings. Select an item then press Enter to display a sub-menu with additional items, or show a pop-up menu with the configuration options. Chipset AGP Bridge Configuration Frequency/Voltage Control System BIOS Cacheable Video BIOS Cacheable Init Display First Auto Detect PCI Clk Spread Spectrum [Enabled] [Disabled] [AGP Slot] [Enabled] [- 0.50 %] Select Menu Item Specific Help Press Enter to set. System BIOS Cacheable [Enabled] Allows you to enable or disable the cache function of the system BIOS. Configuration options: [Disabled] [Enabled] Video BIOS Cacheable [Disabled] Allows you to enable or disable the cache function of the video BIOS. Setting to [Enabled] improves the display speed by caching the display data. Configuration options: [Disabled] [Enabled] ASUS PCH-DL motherboard 4-15

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ASUS PCH-DL motherboard
4-15
DRAM RAS# to CAS# Delay [3]
Controls the latency between the DRAM active command and the read/
write command. Configuration options: [4] [3] [2]
DRAM RAS# Precharge [3]
This item controls the idle clocks after issuing a precharge command to
the DDR SDRAM. Configuration options: [4] [3] [2]
Memory Parity Check [Enabled]
Allows memory parity checking option (ECC). This item is not user-
configuration but set to [Enabled] by default.
4.4.4
Chipset
This menu shows the chipset configuration settings. Select an item then
press Enter to display a sub-menu with additional items, or show a pop-up
menu with the configuration options.
AGP Bridge Configuration
Frequency/Voltage Control
System BIOS Cacheable
[Enabled]
Video
BIOS Cacheable
[Disabled]
Init Display First
[AGP Slot]
Auto Detect PCI Clk
[Enabled]
Spread Spectrum
[- 0.50 %]
Chipset
Item Specific Help
Press Enter to set.
Select Menu
System BIOS Cacheable [Enabled]
Allows you to enable or disable the cache function of the system BIOS.
Configuration options: [Disabled] [Enabled]
Video BIOS Cacheable [Disabled]
Allows you to enable or disable the cache function of the video BIOS.
Setting to [Enabled] improves the display speed by caching the display
data. Configuration options: [Disabled] [Enabled]